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* ARM: renesas: Scrub duplicate memory nodes from DT on Gen3Marek Vasut2021-05-121-0/+1
| | | | | | | | | | | | | | Scrub duplicate /memory@* node entries here. Some R-Car DTs might contain multiple /memory@* nodes, however fdt_fixup_memory_banks() either generates single /memory node or updates the first /memory node. Any remaining memory nodes are thus potential duplicates. However, it is not possible to delete all the memory nodes right away, since some of those might not be DRAM memory nodes, but some sort of other memory. Thus, delete only the memory nodes which are in the R-Car3 DBSC ranges. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
* arm: mach-rmobile: Add CPU info support for RZ/G2Biju Das2021-04-135-4/+65
| | | | | | Add CPU info support for RZ/G2 SoC's. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
* board: silinux: Enable recovery SPL for EK874 boardLad Prabhakar2021-03-161-1/+1
| | | | | | | Enable building SPL for EK874 board which is based on R8A774C0 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar2021-03-161-0/+7
| | | | | | | | | | | | | | | The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* pinctrl: renesas: Add support for R8A774C0Lad Prabhakar2021-03-161-0/+1
| | | | | | | | | | | Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* arm: rmobile: Add HopeRun HiHope RZ/G2H board supportBiju Das2021-03-161-0/+1
| | | | | | | | | | | | | The HiHope RZ/G2H board from HopeRun consists of main board (HopeRun HiHope RZ/G2H main board) and sub board(HopeRun HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2H board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* arm: rmobile: Add HopeRun HiHope RZ/G2N board supportBiju Das2021-03-161-0/+1
| | | | | | | | | | | | | The HiHope RZ/G2N board from HopeRun consists of main board (HopeRun HiHope RZ/G2N main board) and sub board(HopeRun HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das2021-03-161-0/+14
| | | | | | | | | | | | | The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini2021-02-151-0/+1
|\ | | | | | | - Merge the patch to take <asm/global_data.h> out of <common.h>
| * common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: rmobile: Add Beacon EmbeddedWorks RZG2H Dev KitAdam Ford2021-02-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also known as the RZ/G2H. The kit consists of a SOM + Baseboard and supports microSD, eMMC, Ethernet, a couple celular radios, two CAN interfaces, Bluetooth and WiFi. It shares much of the same design as the RZ/G2M and RZ/G2N dev kits. Signed-off-by: Adam Ford <aford173@gmail.com>
* | ARM: rmobile: Add Beacon EmbeddedWorks RZG2N Dev KitAdam Ford2021-02-071-0/+5
|/ | | | | | | | | | | | The Beacon EmbeddedWorks kit is based on the R8A774B1 SoC also known as the RZ/G2N. The kit consists of a SOM + Baseboard and supports microSD, eMMC, Ethernet, a couple celular radios, two CAN interfaces, Bluetooth and WiFi. It shares much of the same design as the RZ/G2M dev kit. Signed-off-by: Adam Ford <aford173@gmail.com>
* pinctrl: renesas: r8a77951: Add R8A774E1 PFC supportBiju Das2020-11-221-0/+1
| | | | | | | | | | | | | Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951), however it doesn't have several automotive specific peripherals. Add a r8a77951 specific pin groups/functions along with common pin groups/functions for supporting both r8a77951 and r8a774e1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* pinctrl: renesas: r8a77965: Add R8A774B1 PFC supportBiju Das2020-11-221-0/+1
| | | | | | | | | | | | | Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965), however it doesn't have several automotive specific peripherals. Add a r8a77965 specific pin groups/functions along with common pin groups/functions for supporting both r8a77965 and r8a774b1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* clk: renesas: Import R8A774C0 clock tables from Linux 5.9Lad Prabhakar2020-10-201-0/+1
| | | | | | | | Import RZ/G2E (R8A774C0) clock tables from Linux 5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* clk: renesas: Add R8A774E1 clock tablesBiju Das2020-10-201-0/+1
| | | | | | | | This sync's the RZ/G2H clock tables with mainline linux 5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* clk: renesas: Add R8A774B1 clock tablesBiju Das2020-10-201-0/+1
| | | | | | | | This sync's the RZ/G2N clock tables with mainline linux 5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* arm: renesas: Add config option for R8A774C0 SoCLad Prabhakar2020-10-201-0/+3
| | | | | | | Add config support for RZ/G2E (a.k.a R8A774C0) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* arm: renesas: Add config option for R8A774E1 SoCBiju Das2020-10-201-0/+3
| | | | | | | Add config support for RZ/G2H(a.k.a R8A774E1) SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* arm: renesas: Add config option for R8A774B1 SoCBiju Das2020-10-201-1/+4
| | | | | | | | | Add config support for RZ/G2N(a.k.a R8A774B1) SoC. Also fixed the alignment issue on R8A774A1 config. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* arm: mach-rmobile: Mark the default s_init function as weakBiju Das2020-09-261-0/+6
| | | | | | | | Mark the default s_init function as weak, so that SoC's can override it if needed, and it will still be discarded if unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* arm: rmobile: Identify R8A7796 r1.3 SoCBiju Das2020-09-261-2/+7
| | | | | | | Add support to identify R8A7796 r1.3 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* Makefile: Rename ALL-y to INPUTS-ySimon Glass2020-07-281-1/+1
| | | | | | | | | | | When binman is in use, most of the targets built by the Makefile are inputs to binman. We then need a final rule to run binman to produce the final outputs. Rename the variable to indicate this, and add a new 'inputs' target. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ARM: rmobile: Add Beacon EmbeddedWorks RZG2M Dev KitAdam Ford2020-07-251-0/+6
| | | | | | | | | | | The Beacon EmbeddedWorks kit is based on the R8A774A1 SoC also known as the RZ/G2M. The kit consists of a SOM + Baseboard and supports microSD, eMMC, Ethernet, a couple celular radios, two CAN interfaces, Bluetooth and WiFi. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: renesas: Add basic R8A774A1 SupportAdam Ford2020-07-251-0/+3
| | | | | | | | In order to build boards based on the R8A774A1, there needs to be a config option from which to enable other drivers and/or flags for this SoC. Signed-off-by: Adam Ford <aford173@gmail.com>
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop init.h from common headerSimon Glass2020-05-183-0/+3
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop net.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | | | | | | Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move some cache and MMU functions out of common.hSimon Glass2019-12-022-0/+2
| | | | | | | | | | | | These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move get_ticks() function out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: rmobile: Temporarily disable PCI dma-ranges updateMarek Vasut2019-11-161-1/+0
| | | | | | | | | | | | | | According to discussion in the Linux PCI list [1], the dma-ranges should be continuous and describe the entire inbound window which the controller can address and not take into account the possible DRAM holes. Temporarily disable this code which updates the dma-ranges until this meaning is sorted out. [1] PCI: rcar: Do not abort on too many inbound dma-ranges Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* spl: Allow tiny printf() to be controlled in SPL and TPLSimon Glass2019-10-082-8/+8
| | | | | | | | | | | | At present there is only one control for this and it is used for both SPL and TPL. But SPL might have a lot more space than TPL so the extra cost of a full printf() might be acceptable. Split the option into two, providing separate SPL and TPL controls. The TPL setting defaults to the same as SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* env: Move env_set() to env.hSimon Glass2019-08-111-0/+1
| | | | | | | Move env_set() over to the new header file. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: renesas: Add R8A77980 V3H Condor board codeMarek Vasut2019-08-091-0/+7
| | | | | | | Add board code for the R8A77980 V3H Condor board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: renesas: Add R8A77980 V3H platform codeMarek Vasut2019-08-093-0/+7
| | | | | | | Add a few bits of platform code to support R8A77980 V3H SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: renesas: Update Gen3 PCIe dma-ranges before bootMarek Vasut2019-07-231-0/+1
| | | | | | | | | Update "dma-ranges" DT property of all PCIe controllers in the system with the up-to-date DRAM layout. This allows the PCIe controller take full advantage of all the available DRAM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* configs: Make USE_TINY_PRINTF depend on SPL||TPL and be defaultTom Rini2019-07-131-1/+0
| | | | | | | | | | | | | | The USE_TINY_PRINTF symbol only changes things within SPL and TPL builds, so make it depend on that support. Next, make it default as within these cases we should rarely have need of more advanced print formats outside of the debug context. To do this, in a few cases we need to correct our Kconfig dependencies as we had cases of non-SPL targets select'ing this symbol. Finally, in the case of a few boards we really do need the full printf functionality. Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: rmobile: Add recovery SPL for R-Car Gen3Marek Vasut2019-05-212-0/+84
| | | | | | | | | | | | | | | | | | | | | Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner2019-05-181-1/+1
| | | | | | | | | | | | | While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances where these configuration items are conditional on SPL. This commit adds SPL variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates the configurations as required. Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Trevor Woerner <trevor@toganlabs.com> [trini: Make the default depend on the setting for full U-Boot, update more zynq hardware] Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: dts: renesas: Add RZ/A1 GR-Peach boardChris Brandt2019-05-071-0/+7
| | | | | | | | | | | | | | | | | Add board code and DTs for Renesas RZ/A1 SoC-based GR-Peach, which is a cheap development platform with RZ/A1H SoC. The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Currently supported are UART, ethernet and RPC SPI. The board can be booted from RPC SPI by writing the u-boot.bin binary to the beginning of the SPI NOR, e.g. using the "sf" command. The board can also be booted via JTAG by setting text base to 0x20020000, loading u-boot.bin there via JTAG and executing it from that address. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: dts: renesas: Add RZ/A1 platform codeChris Brandt2019-05-074-0/+35
| | | | | | | | | | | | Add platform code and DTs for Renesas RZ/A1 R7S72100 SoC. Distinguishing feature of this SoC is that it has up to 10 MiB of on-SoC static RAM (SRAM). The DTs are imported from Linux 5.0.11, commit d5a2675b207d . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Chris Brandt <chris.brandt@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Always select pin control drivers on Gen3Marek Vasut2019-05-041-0/+3
| | | | | | | | To assure the pins on R-Car Gen3 SoCs are configured correctly, always select pin control drivers on Gen3 SoCs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* pinctrl: renesas: Add R8A77965 pin control tablesMarek Vasut2019-04-091-1/+1
| | | | | | | Add pin control tables for R8A77965 from Linux 5.0 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* clk: renesas: Add R8A77965 clock tablesMarek Vasut2019-04-091-1/+1
| | | | | | | | | Add clock tables for R8A77965 from Linux 5.0 , except for the crit, R and Z clock, which are neither used nor supported by the U-Boot clock framework yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Add dedicated R8A77965 SoC supportMarek Vasut2019-04-091-0/+7
| | | | | | | Add dedicated entry for R8A77965 M3N SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Enable multi-DTB fit LZO compressionMarek Vasut2019-04-091-0/+17
| | | | | | | | | | Enable LZO compression of the multi-DTB fitImages, since the U-Boot with multiple DTs enabled is becoming quite large and the DTs can be well compressed. The LZO compression saves almost 200 kiB on the Salvator-X(S) and ULCB targets. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: renesas: Save boot parameters passed in by ATFMarek Vasut2019-04-091-0/+15
| | | | | | | | | | The ATF can pass additional information via the first four registers, x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer to a device tree with platform information. Save these registers for future use. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARM: rmobile: Imply SoC per boardMarek Vasut2019-02-251-4/+10
| | | | | | | | Imply all SoCs supported by a given board. This allows building single U-Boot binary for boards which can have multiple SoCs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
generated by cgit (git 2.34.1) at 2025-09-03 01:13:25 +0000