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* arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() functionPali Rohár2021-06-041-14/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current version of this function uses a lot of incorrect assumptions about the `ranges` DT property: * parent(#address-cells) == 2 * #size-cells == 2 * number of entries == 2 * address size of first entry == 0x1000000 * second child address entry == base + 0x1000000 Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap with PCIe IO space, and trying to define additional MEM space (as a third entry in the `ranges` DT property) causes U-Boot to crash when booting the kernel. ## Flattened Device Tree blob at 04f00000 Booting using the fdt blob at 0x4f00000 Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK ERROR: board-specific fdt fixup failed: <unknown error> - must RESET the board to recover. Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses in the `ranges` property according to https://elinux.org/Device_Tree_Usage#PCI_Address_Translation Now it is possible to increase PCIe MEM space from 16 MiB to maximal value of 127 MiB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Fixes: cb2ddb291ee6 ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions") Reviewed-by: Stefan Roese <sr@denx.de>
* arm: a37xx: pci: Find PCIe controller node by compatible instead of pathPali Rohár2021-06-041-3/+1
| | | | | | | | | Find PCIe DT node by compatible string instead of retrieving it by using hardcoded DT path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún2021-05-242-3/+3
| | | | | | | | | | | | | | | | | This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm64: mvebu: extend the mmio regionGrzegorz Jaszczyk2021-05-162-2/+4
| | | | | | | | | Some of the setups including cn9130 opens mmio window starting from 0xc0000000, reflect it in the u-boot code. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: a8k: move firmware related definitions to fw infoGrzegorz Jaszczyk2021-05-161-0/+3
| | | | | Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: do not map firmware RT service regionGrzegorz Jaszczyk2021-05-162-1/+24
| | | | | | | | | | | | | | There is region left by ATF, which needs to remain in memory to provide RT services. To prevent overwriting it by u-boot, do not provide any mapping for this memory region, so any attempt to access it will trigger synchronous exception. Update sr 2021-04-12: Don't update armada3700/cpu.c mmu table, as this has specific changes included in mainline. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: a8k: align memory regionsjinghua2021-05-161-55/+7
| | | | | | | | 1. RAM: base address 0x0 size 2Gbytes 2. MMIO: base address 0xf0000000 size 1Gbytes Signed-off-by: Ofir Fedida <ofedida@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: octeontx2: Add Octeon TX2 CN9130 CRB supportKonstantin Porotchkin2021-04-291-0/+10
| | | | | | | | This patch adds the base support for the Marvell Octeon TX2 CN9130 CRB. Not all interfaces are supported fully yet. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge tag 'v2021.04-rc4' into nextTom Rini2021-03-154-106/+1
|\ | | | | | | Prepare v2021.04-rc4
| * arm: mvebu: a38x: Remove dead code ARMADA_39XPali Rohár2021-03-124-106/+1
| | | | | | | | | | | | | | | | | | | | | | Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
* | reset: Remove addr parameter from reset_cpu()Harald Seiler2021-03-023-3/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* common: Drop asm/global_data.h from common headerSimon Glass2021-02-025-0/+5
| | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* ARM: mvebu: helios4 adjust env sizes to enable SPI to workDennis Gilmore2021-01-271-0/+1
| | | | | | mirror the clearfog setup to enable SPI to work Signed-off-by: Dennis Gilmore <dennis@ausil.us>
* arm: mvebu: a38x: Configurable USB2 high-speed impedance thresholdJoshua Scott2020-12-072-3/+9
| | | | | | | | | | | | Hardware testing of a board using the Armada 385 has shown that an impedance threshold setting of 0x7 performs better in an eye-diagram test than with Marvell's recommended value 0x6. As other boards may still perform better with Marvell's reccomended value, a configuration option is added with a default value of 0x6. Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz> Reviewed-by: Stefan Roese <sr@denx.de>
* Convert CONFIG_ENV_OVERWRITE to KconfigAdam Ford2020-07-281-1/+0
| | | | | | | | | This converts the following to Kconfig: CONFIG_ENV_OVERWRITE Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Rerun migration, remove some comments] Signed-off-by: Tom Rini <trini@konsulko.com>
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* arm: mvebu: a38x: Adjust UTMI PHY parametersChris Packham2020-07-091-4/+21
| | | | | | | | | | | | | | When running USB compliance tests on our Armada-385 hardware platforms we have seen some eye mask violations. Marvell's internal documentation says: Based on silicon test results, it is recommended to change the impedance calibration threshold setting to 0x6 prior to calibration. Port changes from Marvell's u-boot fork[1] to address this. [1] - https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/a6221551 Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: a38x: Fix typoChris Packham2020-07-091-1/+1
| | | | | | | Fix spelling of Alignment. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Convert CRS305-1G-4S board to CRS3xx-98DX3236Luka Kovacic2020-05-271-5/+5
| | | | | | | | | | | Convert the CRS305-1G-4S board to CRS3xx-98DX3236 to enable easier implementation of new CRS3xx series boards, based on Marvell Prestera 98DX3236. Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Jakov Petrina <jakov.petrina@sartura.hr>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-187-0/+10
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop linux/delay.h from common headerSimon Glass2020-05-186-0/+6
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop asm/ptrace.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop init.h from common headerSimon Glass2020-05-184-0/+4
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop net.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | | | | | | Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
* rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner2020-05-152-6/+6
| | | | | | | | Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
* arm: mvebu: correct SPL boot configs for SPI/MMCJoel Johnson2020-04-221-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update mvebu SPL boot selection mechanism for the move to driver model usage by ensuring that the required driver support for SPI and MMC booting is available in SPL when the respective boot method is selected. Previously, all mvebu boards selected a boot method (implicitly MVEBU_SPL_BOOT_DEVICE_SPI for many) even if SPL booting wasn't used. This changes mvebu boot method selection to depend on SPL usage which resolves the issue with aarch64 boards which don't use SPL getting an implicit boot device selection resulting in unmet dependencies. The 32-bit arm boards do use SPL, but I'm led to conclude that most aren't intentionally using the MVEBU_SPL_BOOT_DEVICE selection since none have SPL_DM_SPI enabled in their defconfig even though they still implicitly select the SPI boot method. This also results in the new addition of SPL_GPIO_SUPPORT to helios4. The mainline dts for helios4 includes the cd-gpios entry for sdhci with identical addresses as the clearfog dts. I don't have a helios4 board to confirm, but based on the current source conclude that the board itself is either wired to pull the signal low for eMMC, or the default MMC boot isn't fully functional in mainline. In either case, as far as I can tell, including the GPIO support will at least cause no regression. Tested on SolidRun ClearFog devices. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: a37xx: add device-tree fixer for PCIe regionsMarek Behún2020-04-142-0/+55
| | | | | | | | | | | In case when ARM Trusted Firmware changes the default address of PCIe regions (which can be done for devices with 4 GB RAM to maximize the amount of RAM the device can use) we add code that looks at how ATF changed the PCIe windows in the CPU Address Decoder and changes given device-tree blob accordingly. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: a37xx: improve code determining memory info structuresMarek Behún2020-04-143-26/+235
| | | | | | | | | | | | | | | | | | | | | | | | Currently on Armada-37xx the mem_map structure is statically defined to map first 2 GB of memory as RAM region, and system registers and PCIe region device region. This is insufficient for when there is more RAM or when for example the PCIe windows is mapped to another address by the CPU Address Decoder. In the case when the board has 4 GB RAM, on some boards the ARM Trusted Firmware can move the PCIe window to another address, in order to maximize possible usable RAM. Also the dram_init and dram_init_banksize looks for information in device-tree, and therefore different device trees are needed for boards with different RAM sizes. Therefore we add code that looks at how the ARM Trusted Firmware has configured the CPU Address Decoder windows, and then we update the mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank base addresses and sizes accordingly. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: armada-8k: move dram init codeMarek Behún2020-04-144-46/+59
| | | | | | | | Move Armada-8k specific DRAM init code into armada-8k specific directory. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: clearfog: initial ClearFog Base variantJoel Johnson2020-04-141-0/+2
| | | | | | | | Add a unique entry for ClearFog Base variant, reflected in the board name and adjusted SerDes topology. Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: fix SerDes table alignmentJoel Johnson2020-04-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Tested on Solidrun ClearFog Base. Table alignment was: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 3 | SATA1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | USB3 HOST0 | | 5 | 4 | SGMII2 | -------------------------------- After the change, it's correctly aligned as: | Lane # | Speed | Type | -------------------------------- | 0 | 3 | SATA0 | | 1 | 0 | SGMII1 | | 2 | 5 | PCIe1 | | 3 | 5 | USB3 HOST1 | | 4 | 5 | PCIe2 | | 5 | 0 | SGMII2 | -------------------------------- Signed-off-by: Joel Johnson <mrjoel@lixil.net> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: update RTC values for PCIe memory wrappersChris Packham2020-04-144-0/+35
| | | | | | | | | | | | | | | | | | Update the RTC (Read Timing Control) values for PCIe memory wrappers following an ERRATA (ERRATA# TDB). This means the PCIe accesses will used slower memory Read Timing, to allow more efficient energy consumption, in order to lower the minimum VDD of the memory. Will lead to more robust memory when voltage drop occurs (VDDSEG) The code is based on changes from Marvell's U-Boot, specifically: https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/20cd2704072512de176e048970f2883db901674b https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/eb608a7c8dd0d42b87601a61b9c0cc5615ab94b2 https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c4af19ae2bf08cf6e450e741ce4f04d402a5cb6b Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+1
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: mvebu: clearfog: run-time selection of DT fileBaruch Siach2020-01-211-0/+1
| | | | | | | | Set the kernel device-tree file (fdtfile environment variable) based on run-time detection of the platform. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
* common: Move hang() to the same header as panic()Simon Glass2020-01-171-0/+1
| | | | | | | | | | At present panic() is in the vsprintf.h header file. That does not seem like an obvious choice for hang(), even though it relates to panic(). So let's put hang() in its own header. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Migrate a few more files] Signed-off-by: Tom Rini <trini@konsulko.com>
* common: Move RAM-sizing functions to init.hSimon Glass2020-01-171-0/+1
| | | | | | | These functions relate to memory init so move them into the init header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move reset_cpu() to the CPU headerSimon Glass2020-01-171-0/+1
| | | | | | Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Move board_get_usable_ram_top() out of common.hSimon Glass2019-12-021-0/+1
| | | | | | | | | Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Move some cache and MMU functions out of common.hSimon Glass2019-12-022-0/+2
| | | | | | | | | | | | These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: mvebu: don't dereference null bd pointerChris Packham2019-11-141-10/+0
| | | | | | | | As mentioned in doc/README.arm-relocation gd->bd is not available in dram_init() so we shouldn't attempt to access it. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Avoid generating kwbimage.cfg in the source treeBin Meng2019-10-291-2/+2
| | | | | | | | | | | | | | | | At present some boards generate kwbimage.cfg in the source tree during the build. This breaks buildman testing on some systems where the source tree is read-only. Update makefile rules to generate it in the build tree instead. Note some other boards have the kwbimage.cfg file written in advance, hence we need check if the file exists in the build tree first, otherwise we fall back to one in the source tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm: mvebu: set 38x and 39x AVS on lower frequencyBaruch Siach2019-07-114-0/+40
| | | | | | | | | | | | | Reduce Auto Voltage Scaling VDD limit when core frequency is lower than 1600MHz. This reduces core voltage level from 1.25V to 1.15V, which saves power. The code is taken from Marvell's U-Boot 2013.01 revision 18.06. Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: add support for boot from SATABaruch Siach2019-07-114-0/+15
| | | | | | | | | Add the required Kconfig and macro definitions to allow boot from SATA on Armada 38x systems. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: fix ahci mbus config in SPLBaruch Siach2019-07-111-0/+4
| | | | | | | | | SPL does not initialize mbus_dram_info. Don't change the ahci mbus settings of the ROM. This allows the ahci to work in SPL. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: Add CRS305-1G-4S boardLuka Kovacic2019-05-091-0/+7
| | | | | | | | | | | | | | | CRS305-1G-4S has a switch chip with an integrated CPU (98DX3236) and like some of the other similar boards requires bin_hdr. bin_hdr (DDR3 init stage) is currently retrieved from the stock bootloader and compiled into the kwb image. Adds support for U-Boot, enable UART, SPI, Winbond SPI flash chip support and writing env to SPI flash. Signed-off-by: Luka Kovacic <me@lukakovacic.xyz> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: turris_omnia: add RESET button handlingMarek Behún2019-05-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is a Factory RESET button on the back side of the Turris Omnia router. When user presses this button before powering the device up and keeps it pressed, the microcontroller prevents the main CPU from booting and counts how long the RESET button is being pressed (and indicates this by lighting up front LEDs). The idea behind this is that the user can boot the device into several Factory RESET modes. This patch adds support for U-Boot to read into which Factory RESET mode the user booted the device. The value is an integer stored into the omnia_reset environment variable. It is 0 if the button was not pressed at all during power up, otherwise it is the number identifying the Factory RESET mode. This patch also changes bootcmd to a special hardcoded value if Factory RESET button was pressed during device powerup. This special bootcmd value sets the colors of all the LEDs on the front panel to green and then tries to load the rescue image from the SPI flash memory and boot it. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: turris_omnia: move ATSHA204A from defconfig to KconfigMarek Behún2019-05-031-0/+1
| | | | | | | | | This driver is required for Turris Omnia to read ethernet addresses. Move the dependency from turris_omnia_defconfig to Kconfig. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: turris_omnia: move I2C dependencies to KconfigMarek Behún2019-05-031-0/+5
| | | | | | | | | | | | | The I2C dependencies are defined in include/configs/turris_omnia.h, because Turris Omnia won't boot correctly without I2C support. Move these dependencies to Kconfig, so that they are selected if Turris Omnia is selected as target. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* mmc: mv_sdhci: add driver model supportPierre Bourdon2019-04-262-1/+3
| | | | | | | | | | | | | The new DM implementation currently does not support the Sheeva 88SV331xV5 specific quirk present in the legacy implementation. The legacy code is thus kept for this SoC and others not yet migrated to DM_MMC. Signed-off-by: Pierre Bourdon <delroth@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit (git 2.34.1) at 2025-09-02 18:58:08 +0000