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* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-292-1/+25
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| * ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQMasahiro Yamada2015-04-291-1/+1
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Add Zynq PicoZed board supportNathan Rossi2015-04-292-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PicoZed is a System-on-Module board which is marketed as part of the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000 processor. This patch adds support that covers all the variants of the PicoZed including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This patch set however only covers support for the System-on-Module and does not cover any extra components that are available on carrier boards (except those that are fanned out of the module itself). More information on this board, its variants and available carrier boards is available at: http://zedboard.org/product/picozed Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-04-282-0/+48
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| * socfpga: implement arria V socdk SPI flash config in dtsPavel Machek2015-04-271-0/+24
| | | | | | | | | | | | | | Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek <pavel@denx.de>
| * socfpga: implement socdk SPI flash config in dtsPavel Machek2015-04-241-0/+24
| | | | | | | | | | | | | | SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek <pavel@denx.de>
* | exynos: sandbox: ti: Add SPDX license identifiers and notesSimon Glass2015-04-226-0/+12
|/ | | | | | | | | | | | | | | | | | | | | | | | For some files I neglected to add a license. Rectify this: arch/arm/dts/exynos4210-pinctrl-uboot.dtsi arch/arm/dts/exynos4x12-pinctrl-uboot.dtsi arch/arm/dts/exynos5250-pinctrl-uboot.dtsi arch/arm/dts/exynos54xx-pinctrl-uboot.dtsi arch/arm/dts/s5pc100-pinctrl.dtsi arch/arm/dts/s5pc110-pinctrl.dtsi This file came from Linux and has no license information there, so add a comment to that effect: arch/sandbox/include/asm/bitops.h This file also came from Linux - presumably someone from TI could add the license: include/dt-bindings/pinctrl/omap.h Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Ingrid Viitanen <ingrid.viitanen@nokia.com>
* dm: usb: exynos: Enable both EHCI and XHCI on snowSimon Glass2015-04-181-0/+1
| | | | | | | Since we can support both controllers now, enable this in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* dm: usb: tegra: Add vbus GPIOs for nyanSimon Glass2015-04-181-0/+2
| | | | | | | | These are needed to enable the USB bus (although not sufficient since it still does not work). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* dm: ls1021a: dts: Add QSPI dts nodeHaikun.Wang@freescale.com2015-04-183-0/+39
| | | | | | | | Add QSPI controller dts node in ls1021a.dtsi. Add QSPI slave device dts node in ls1021a-twr.dts and ls1021a-qds.dts. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: ls1021a: dts: Update DSPI node to support DM SPIHaikun.Wang@freescale.com2015-04-183-18/+4
| | | | | | | | | | Update DSPI controller node in ls1021a.dtsi. Update flash device node in ls1021a-qds.dts. Ls1021a-twr board doesn't support DSPI, so remove DSPI node in ls1021a-twr.dts. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: ls1021a: dts: Change address_cells and size_cells from 2 to 1haikun2015-04-183-40/+40
| | | | | | | | | | | | | | | Change address_cells and size_cells of root node and 'soc' node from 2 to 1. We backport ls1021a device tree source files from kernel to u-boot. Kernel files set address_cells and size_cells to 2 in order to access more than 4GB space. But we don't have this requirement now and u-boot fdtdec_get_xxx interfaces can't support property whose size is 'u64' completely. So make this change. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: ls1021a: Bring in ls1021a dts files from linux kernelhaikun2015-04-184-0/+662
| | | | | | | | Bring in required device tree files for ls1021a from Linux. These are initially unchanged and have a number of pieces not needed by U-Boot. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: arm: Bring in skeleton64 device tree file from LinuxHaikun.Wang@freescale.com2015-04-181-0/+13
| | | | | | | | | Backport of kernel commits: 7c14f6c719de092d69c81877786e83ce7ae1a860 35faad2a1563b3d4dc983a82ac41033fe053870c Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* cros_ec: exynos: Match up device tree with kernel versionSimon Glass2015-04-183-9/+9
| | | | | | | | | | | The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org>
* dts: peach_pi: Add DT properties needed for displayAjay Kumar2015-04-061-0/+3
| | | | | | | | | | Add backlight enable GPIO, and delay needed for panel powerup via FIMD DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dts: peach_pit: Add SLP and RST GPIO properties in parade DT nodeAjay Kumar2015-04-061-0/+2
| | | | | | | | | | Now that parade driver supports reading SLP and RST GPIO from DT, specify the same in parade DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dts: exynos54xx: Add samsung, pwm-out-gpio property to FIMD nodeAjay Kumar2015-04-061-0/+1
| | | | | | | | | | Now that the exynos_fb driver supports handling backlight GPIO via DT, specify pwm output property via FIMD DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: tegra: rename colibri_t20 board/configuration/device-treeMarcel Ziswiler2015-03-302-1/+1
| | | | | | | | | | | In accordance with our other modules supported by U-Boot and as agreed upon for Apalis/Colibri T30 get rid of the carrier board in the board/ configuration/device-tree naming. While at it also bring the prompt more in line with our other products. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: UniPhier: adjust device trees for business transferMasahiro Yamada2015-03-159-68/+77
| | | | | | | Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-03-102-3/+14
|\ | | | | | | | | | | | | Conflicts: README Signed-off-by: Tom Rini <trini@konsulko.com>
| * apalis/colibri_t30: fix MMC/SD card detect GPIOsMarcel Ziswiler2015-03-042-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the MMC/SD card detect GPIOs for Apalis T30 which got broken by the following commit: 2b2b50bc8748 "dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOs" While at it also re-add the comments describing which particular Apalis/Colibri pins those GPIOs are on. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Agner <stefan.agner@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * dm: tegra: dts: add aliases for spi on apalis_t30Marcel Ziswiler2015-03-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | All boards with a SPI interface have a suitable spi alias except Apalis T30. Add these missing aliases just as the following commit did for the others: d2f60f93325a "dm: tegra: dts: Add aliases for spi on tegra30 boards" Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | dt: socfpga: Import and enable Arria V DK DTSMarek Vasut2015-03-043-0/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | Import DTS for Arria V development kit and enable support for DT. The DT is imported from Linux 3.19-rc1 as of commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* | dt: socfpga: Import and enable Cyclone V DK DTSMarek Vasut2015-03-042-1/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | Import DTS for Cyclone V development kit and enable support for DT. The DT is imported from Linux 3.19-rc1 as of commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* | ARM: UniPhier: add xHCI device nodes to PH1-Pro4 device treeMasahiro Yamada2015-03-012-6/+15
| | | | | | | | | | | | | | | | | | | | Each USB port corresponds to the following IP core: port0: xHCI (0x65a00000) SS+HS port1: xHCI (0x65c00000) HS (SS PHY is not implemented) port2: EHCI (0x5a800100) HS port3: EHCI (0x5a810100) HS Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | ARM: UniPhier: replace "usb-ehci" with "generic-ehci"Masahiro Yamada2015-03-014-16/+16
|/ | | | | | | EHCI host controllers have a common register interface. We may wish to implement a generic EHCI driver someday. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Odroid-XU3: Add eMMC-reset node on DTJoonyoung Shim2015-02-131-0/+5
| | | | | | | | This needs for special handling of nRESET_OUT line(GPD1-0 gpio) for eMMC memory to perform complete reboot on Odroid XU3 board. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Odroid: Add eMMC-reset node on DTJoonyoung Shim2015-02-131-0/+5
| | | | | | | | This needs for special handling of nRESET_OUT line(GPK1-2 gpio) for eMMC memory to perform complete reboot on Odroid X2/U3 boards. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: UniPhier: set I2C offset length of on-board EEPROM in DTSMasahiro Yamada2015-02-071-0/+1
| | | | | | | | | | | | | The EEPROM chips on UniPhier reference daughter boards expect 2-byte offset address. Since 7132b9fd68a1 (dm: i2c: dts: Support an offset-len device tree property), I2C sub-nodes can have "u-boot,i2c-offset-len" property. It is convenient to set the default I2C offset address length in Device Tree, so that we do not have to set it on the command line. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* ARM: UniPhier: move EEPROM device node into a separate DTSMasahiro Yamada2015-02-075-20/+23
| | | | | | | | | This EEPROM chip is installed on the expansion board commonly used on UniPhier platform. To avoid duplicated description, move the EEPROM node to a separate file and include it from other device tree sources. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* dm: exynos: dts: Set the offset length for cros_ecSimon Glass2015-01-291-0/+1
| | | | | | The EC has no concept of offset, so use a value of 0. Signed-off-by: Simon Glass <sjg@chromium.org>
* odroid u3: dts: add missing i2c aliasesPrzemyslaw Marczak2015-01-291-0/+7
| | | | | | | | This change fixes i2c bus numbering for Odroid U3. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com>
* arndale: dts: add missing i2c aliasesPrzemyslaw Marczak2015-01-291-0/+8
| | | | | | | | | | Without this alias setting, the seq numbers of the i2c devices are wrong. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com>
* exynos4: dts: add missing i2c propertiesPrzemyslaw Marczak2015-01-291-8/+16
| | | | | | | | | | | | This patch modify i2c nodes in exynos4.dtsi with: - adding proper interrupts arrays for each i2c node, which allows to decode periph id - add reg address for each i2c node for i2c driver internal use Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com>
* dm: exynos: dts: Use GPIO bank phandles for GPIOsSimon Glass2015-01-2912-39/+30
| | | | | | | | U-Boot now supports using GPIOs using bank phandles instead of global numbers. Update the exynos device tree files to use this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: tegra: dts: Use TEGRA_GPIO() macro for all GPIOsSimon Glass2015-01-2918-85/+109
| | | | | | This new method is much easier and matches the kernel. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2015-01-081-5/+5
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| * dt: socfpga: Replace num-chipselect with num-csMarek Vasut2015-01-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | This optional DT property is called 'num-cs', so repair the misnomers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssiMarek Vasut2015-01-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux now also contains SPI driver, yet the name is 'snps,dw-apb-ssi'. Fix the naming before we have to support both names. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | cros-ec-keyboard: Synchronize DT binding from linuxSjoerd Simons2015-01-053-113/+9
|/ | | | | | | | | | | | | | | | | | The ChromeOS EC keyboard is used by various different chromebooks. Peach pi being the third board in the u-boot tree to use it (snow and peach pit the other two). Rather then embedding the same big DT node in the peach-pi DT again, copy the dtsi snippit & bindings documentation from linux and include it in all 3 boards. This slightly changes the dt bindings in u-boot: * google,key-rows becomes keypad,num-rows * google,key-colums becomes keypad,num-colums * google,repeat-delay-ms and google,repeat-rate-ms are no longer used and replaced by hardcoded values (similar to tegra kbc) Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2015-01-018-4/+1288
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| * ARM: tegra: Enable PCIe on Jetson TK1Thierry Reding2014-12-181-0/+347
| | | | | | | | | | | | | | | | | | | | The Jetson TK1 has an ethernet NIC connected to the PCIe bus and routes the second root port to a miniPCIe slot. Enable the PCIe controller and the network driver to allow the device to boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Add Tegra124 PCIe device tree nodeThierry Reding2014-12-181-0/+66
| | | | | | | | | | | | | | | | | | Add the device tree node for the PCIe controller found on Tegra124 SoCs. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Add GIC for Tegra124Thierry Reding2014-12-181-0/+13
| | | | | | | | | | | | | | | | | | | | | | Add a device tree node for the GIC v2 found on the Cortex-A15 CPU complex of Tegra124. U-Boot doesn't use this but subsequent patches will add device tree nodes that reference it by phandle. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Enable PCIe on BeaverThierry Reding2014-12-181-0/+245
| | | | | | | | | | | | | | | | | | | | | | | | The Beaver has an ethernet NIC connected to the PCIe bus. Enable the PCIe controller and the network device driver so that the device can boot over the network. In addition the board has a mini-PCIe expansion slot. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Enable PCIe on CardhuThierry Reding2014-12-181-0/+362
| | | | | | | | | | | | | | | | | | | | | | The PCIe bus on Cardhu is routed to the dock connector. An ethernet NIC is available on the dock over the PCIe bus. Enable the PCIe controller and the network device driver so that the device can boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Add Tegra30 PCIe device tree nodeThierry Reding2014-12-181-0/+74
| | | | | | | | | | | | | | | | Add the device tree node for the PCIe controller found on Tegra30 SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Add GIC for Tegra30Thierry Reding2014-12-181-0/+9
| | | | | | | | | | | | | | | | | | | | Add a device tree node for the GIC found on Tegra30. U-Boot doesn't use it directly but subsequent patches will add device tree nodes that reference it by phandle. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: Enable PCIe on TrimSliceThierry Reding2014-12-181-0/+69
| | | | | | | | | | | | | | | | | | | | The TrimSlice has an ethernet NIC connected to the PCIe bus. Enable the PCIe controller and the network driver so that the device can boot over the network. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit (git 2.34.1) at 2024-11-19 23:37:35 +0000