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* arm: armv7m: Clean up some thumb / compiler flag optionsTom Rini2018-05-231-1/+1
| | | | | | | | - The correct way to build with thumb mode is to select SYS_THUMB_BUILD - We should be setting -march=armv7-m in arch/arm/Makefile not the sub-config.mk file. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: v7R: Add support for MPULokesh Vutla2018-05-072-42/+4
| | | | | | | | | | | | | The Memory Protection Unit(MPU) allows to partition memory into regions and set individual protection attributes for each region. In absence of MPU a default map[1] will take effect. Add support for configuring MPU on Cortex-R, by reusing the existing support for Cortex-M processor. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0460d/I1002400.html Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-077-16/+7
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* armv7m: disable icache before linux bootingPatrice Chotard2018-04-101-0/+3
| | | | | | | | Similarly to ARMV7, on ARMV7M instruction cache memory needs to be disabled before running linux kernel to avoid kernel to be stuck. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* mach-stm32: Use default memory map as background regionPatrice Chotard2018-03-131-5/+6
| | | | | | | | | | | | | | | | | | On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires uncachable regions. These regions are defined in DT. Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able to configure MPU regions depending on DT settings. As kernel is able to configure MPU, this allows to remove MPU region settings in bootloader. On Cortex M processors, MPU allows to use a default memory map. (see B3.5.4 MPU Control Register, MPU_CTRL in https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual) Use the default memory map as background region for all STM32 SoCs family with an additional MPU region corresponding to the SDRAM area. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* stm32: fix STMicroelectronics copyrightPatrice Chotard2017-11-062-4/+4
| | | | | | | Uniformize STMicroelectronics copyrights headers for STM32 related code. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* armv7m: mpu_config add missing breakxypron.glpk@gmx.de2017-08-131-0/+1
| | | | | | | | | For DEVICE_NON_SHARED the newly assigned value of attr is overwritten due to a missing break. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* armv7m: Fix larger buildsPhil Edworthy2017-06-051-1/+3
| | | | | | | The branch instruction only has an 11-bit relative target address, which is sometimes not enough. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
* armv7m: add MPU configuration supportVikas Manocha2017-05-122-1/+83
| | | | | | | | | | | | Cortex-M archs support option memory protection unit (MPU). MPU is used to set the memory types, attributes, access permissions for different regions, cache policies of the device. e.g. using MPU it is possible to configure memory region as device memory or strongly ordered, memory attributes like execute never, cache policies like write-back or write-through. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* arvm7m: add cleanup before linux bootingVikas Manocha2017-05-121-0/+19
| | | | | | | Data cache memory needs to be disabled before handing over control to linux kernel. This patch populates the cleanup_before_linux stub. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* armv7m: cache: add flush & invalidate all dcacheVikas Manocha2017-05-121-0/+23
| | | | | | | | | Add functionality to flush & invalidate all the dcache using the prototype declared in common header file. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> [trini: Add dummy functions for the not-enabled case] Signed-off-by: Tom Rini <trini@konsulko.com>
* armv7m: add instruction & data cache supportVikas Manocha2017-04-082-2/+337
| | | | | | | This patch adds armv7m instruction & data cache support. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> cc: Christophe KERELLO <christophe.kerello@st.com>
* armv7m: Add SysTick timer driverPhil Edworthy2017-03-142-0/+118
| | | | | | | | | | | | | The SysTick is a 24-bit down counter that is found on all ARM Cortex M3, M4, M7 devices and is always located at a fixed address. The number of reference clock ticks that correspond to 10ms is normally defined in the SysTick Calibration register's TENMS field. However, on some devices this is wrong, so this driver allows the clock rate to be defined using CONFIG_SYS_HZ_CLOCK. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
* stm32: Add SDRAM support for stm32f746 discovery boardToshifumi NISHINAGA2016-07-141-1/+1
| | | | | | | | | | This patch adds SDRAM support for stm32f746 discovery board. This patch depends on previous patch. This patch is based on STM32F4 and emcraft's[1]. [1]: https://github.com/EmcraftSystems/u-boot Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
* stm32: move stm32 specific code to mach-stm32Vikas Manocha2016-01-2011-1085/+0
| | | | | | | This patch moves stm32 sources at one place, with this armv7m now contains only generic stuff. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* Change e-mail address of Kamil LulkoKamil Lulko2015-12-0513-13/+13
| | | | Signed-off-by: Kamil Lulko <kamil.lulko@gmail.com>
* arm: stm32f4: fix a bug when a random sector gets erasedVadzim Dambrouski2015-11-101-0/+3
| | | | | | | | | | Old sector number is not being cleared from FLASH_CR register. For example when first erased sector was 001 and then you want to erase sector 010, sector 011 gets erased instead. This patch clears old sector number from FLASH_CR register before a new one is written. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
* arm: stm32f4: fix a bug when only first sector gets erasedVadzim Dambrouski2015-11-101-1/+1
| | | | | | | | flash_lock call is inside a for loop, so after the first iteration flash is locked and no more sectors can be erased. Move flash_lock out of the loop. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
* stm32f4: add cpu clock option for 180 MHzAntonio Borneo2015-07-271-10/+24
| | | | | | | | | | | While most stm32f4 run at 168 MHz, stm32f429 can work till 180 MHz. Add option to select 180 MHz through macro CONFIG_SYS_CLK_FREQ. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> To: Albert Aribaud <albert.u.boot@aribaud.net> To: Tom Rini <trini@konsulko.com> To: Kamil Lulko <rev13@wp.pl> Cc: u-boot@lists.denx.de
* ARMv7M: add STM32F1 supportMatt Porter2015-05-286-0/+548
| | | | | | Add ARMv7M STM32F1 support including clocks, timer, gpio, and flash. Signed-off-by: Matt Porter <mporter@konsulko.com>
* ARMv7M: Add STM32F4 supportrev13@wp.pl2015-04-226-0/+520
| | | | | Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: Add ARMv7-M supportrev13@wp.pl2015-04-224-0/+67
Signed-off-by: Kamil Lulko <rev13@wp.pl>
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