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* riscv: Add kconfig option to run U-Boot in S-modeAnup Patel2018-12-054-17/+48
| | | | | | | | | | | | | | | | | | This patch adds kconfig option RISCV_SMODE to run U-Boot in S-mode. When this opition is enabled we use s<xyz> CSRs instead of m<xyz> CSRs. It is important to note that there is no equivalent S-mode CSR for misa and mhartid CSRs so we expect M-mode runtime firmware (BBL or equivalent) to emulate misa and mhartid CSR read. In-future, we will have more patches to avoid accessing misa and mhartid CSRs from S-mode. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2018-12-0463-3288/+6902
|\ | | | | | | - DT sync with Linux 4.19 and minor fixes.
| * ARM: dts: Turn ULCB into Multi-DTB configMarek Vasut2018-12-043-0/+22
| | | | | | | | | | | | | | | | Bundle DTBs for R8A7795, R8A7796 ULCB variants into single U-Boot build and let U-Boot choose between them based on the CPU model. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: dts: Turn Salvator-X into Multi-DTB configMarek Vasut2018-12-044-0/+28
| | | | | | | | | | | | | | | | | | Bundle DTBs for R8A7795, R8A7796, R8A77965 Salvator-X variants into the single U-Boot build and let U-Boot choose between them based on the CPU model. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Drop unused macros from Gen3 boardsMarek Vasut2018-12-042-3/+0
| | | | | | | | | | | | | | | | Drop unused MSTP macros from Gen3 boards. These are no longer needed as the boards are using clock framework to manipulate clock. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Set environment variable containing CPU typeMarek Vasut2018-12-042-9/+33
| | | | | | | | | | | | | | Set environment variable 'platform' containing the CPU type. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Enable MMC extensionsMarek Vasut2018-12-041-0/+5
| | | | | | | | | | | | | | | | | | Enable extended MMC commands and GPT partition table support. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Sync Gen3 DTs with Linux 4.19.6Marek Vasut2018-12-0418-3004/+5961
| | | | | | | | | | | | | | | | | | | | Synchronize DTs with mainline Linux 4.19.6 , commit 96db90800c06d3fe3fa08eb6222fe201286bb778 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Sync Gen2 DTs with Linux 4.19.6Marek Vasut2018-12-0412-40/+309
| | | | | | | | | | | | | | | | | | | | Synchronize DTs with mainline Linux 4.19.6 , commit 96db90800c06d3fe3fa08eb6222fe201286bb778 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract i2c6 on M2W PorterMarek Vasut2018-12-042-5/+5
| | | | | | | | | | | | | | | | | | | | | | The i2c6 node is missing in mainline Linux thus far, pull it into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract SCIF2 node on E3 EbisuMarek Vasut2018-12-042-16/+19
| | | | | | | | | | | | | | | | | | | | | | The SCIF2 node is not in Linux 4.17 DTs on E3, pull it into U-Boot specific DT extras until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract SDHI nodes on E3 EbisuMarek Vasut2018-12-044-60/+182
| | | | | | | | | | | | | | | | | | | | | | The SDHI nodes are not in Linux 4.17 DTs in E3, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract SDHI extras on H3, M3W, M3N Salvator-XMarek Vasut2018-12-044-14/+90
| | | | | | | | | | | | | | | | | | | | | | The SDHI nodes are missing features supported in upstream U-Boot, like mode support properties. Pull the extras into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCBMarek Vasut2018-12-043-9/+45
| | | | | | | | | | | | | | | | | | | | | | The SDHI nodes are missing features supported in upstream U-Boot, like mode support properties. Pull the extras into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract CPLD node on H3 and M3W ULCBMarek Vasut2018-12-043-9/+22
| | | | | | | | | | | | | | | | | | | | | | The CPLD node is missing in Linux 4.17 DTs on H3/M3W ULCB, pull the node into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract AVB node extras on V3M EagleMarek Vasut2018-12-042-11/+20
| | | | | | | | | | | | | | | | | | | | | | The AVB node is not complete in Linux 4.17 DTs on V3M Eagle, pull the AVB node extras into U-Boot specific DT until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract SDHI nodes on M3NMarek Vasut2018-12-042-28/+48
| | | | | | | | | | | | | | | | | | | | | | The SDHI nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract USB nodes on M3NMarek Vasut2018-12-042-44/+64
| | | | | | | | | | | | | | | | | | | | | | The USB nodes are not in Linux 4.17 DTs in M3N, pull them into U-Boot specific DT extras until they hit mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Extract RPC node to u-boot specific DTMarek Vasut2018-12-0414-68/+85
| | | | | | | | | | | | | | | | | | | | | | The RPC DT bindings are still work in progress. Extract the RPC DT node from the DT to allow easier update and so it can be replaced once the DT bindings are stable. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: dts: rmobile: Add soc label to Gen3Marek Vasut2018-12-044-4/+4
| | | | | | | | | | | | | | | | | | Add label to the /soc node, so it can be referenced from the U-Boot DTs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
| * ARM: rmobile: Convert to bootm_sizeMarek Vasut2018-12-048-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both fdt_high and initrd_high. This change implies that the FDT and initrd will always be copied into the first 256 MiB of RAM instead of being used in place, which can cause various kinds of inobvious problems. The simpler problems include FDT or initrd being overwritten or being used from unaligned addresses, especially on ARM64. The overhead of copying the FDT to aligned location is negligible and these problems go away, so the benefit is significant. Regarding alignment problems with fitImage. The alignment of DT properties is always 32 bits, which implies that the alignment of the "data" property in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The kernel expects all elements, including DT and initrd, to be aligned to 64 bits on ARM64, thus using them in place may not be possible. Using the bootm_size assures correct alignment, again with negligible overhead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com>
| * mmc: Do not issue CMD 6 on SD 1.00 and SD 1.01Marek Vasut2018-12-041-0/+4
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to SD Specifications Part 1 Physical Layer Simplified Specification Version 6.00 August 29, 2018, section 4.3.10 (Switch Function Command) and section 5.6 (SCR register), SD cards version 1.00 and 1.01 do not support the SD CMD 6. Currently, U-Boot will issue CMD 6 unconditionally in sd_set_card_speed() while configuring the bus for selected frequency. This will make SD cards version 1.00 and 1.01 time out and thus fail detection altogether. Fix this by not sending CMD 6 on such cards. Tested on Matsushita Electric Industrial Co., Ltd. Japan RP-SD008B / Victor 8MB SD card, CU-SD008, which is correctly detected with this patch as: Device: sd@ee160000 Manufacturer ID: 1 OEM: 5041 Name: S008B Bus Speed: 25000000 Mode : SD Legacy Rd Block Len: 512 SD version 1.0 High Capacity: No Capacity: 6.5 MiB Bus Width: 4-bit Erase Group Size: 512 Bytes Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
* Prepare v2019.01-rc1Tom Rini2018-12-031-3/+3
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* MAINTAINERS: board: qcom: db820c: update email.Jorge Ramirez-Ortiz2018-12-031-1/+1
| | | | | | Update email address Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
* Revert "serial: ns16550: fix debug uart putc called before init"Simon Goldschmidt2018-12-031-16/+2
| | | | | | | | | | | | | | | This reverts commit 6f57c34473d37b8da5e6a3764d0d377d748aeef1 since it does not seem to work at least on rk3399. The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud rate prescaler register is readable only when USR[0] is zero. Since this bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather drop this than making the ns16550 debug uart more platform specific. Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com
* dm: MIGRATION: Update migration plan for BLKTom Rini2018-12-031-7/+5
| | | | | | | | | The biggest part of migration to using CONFIG_BLK is that we need to have the various subsystems migrated first, so reword the plan here to reference the new deadlines. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: MIGRATION: Add migration plan for CONFIG_SATATom Rini2018-12-032-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As the core of the subsystem has been converted along with some of the drivers, formalize a deadline for migration. Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Cc: Ludwig Zenz <lzenz@dh-electronics.de> Cc: Marek Vasut <marex@denx.de> Cc: Max Krummenacher <max.krummenacher@toradex.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Soeren Moch <smoch@web.de> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: MIGRATION: Add migration plan for DM_USBTom Rini2018-12-032-0/+20
| | | | | | | | | As much of the USB system has been migrated to DM now, formalize a deadline for migration. Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: MIGRATION: Add migration plan for DM_MMCTom Rini2018-12-032-0/+19
| | | | | | | | | | | | Given that at this point the MMC subsystem itself has been migrated along with a number of subsystem drivers, formalize a deadline for migration. Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblazeTom Rini2018-12-0346-76/+342
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2019.01 microblaze: - Use default functions for memory decoding - Showing model from DT zynq: - Fix spi flash DTs - Fix zynq_help_text with CONFIG_SYS_LONGHELP - Tune cse/mini configurations - Enabling cse/mini testing with current targets zynqmp: - Enable gzip SPL support - Fix chip detection logic - Tune mini configurations - DT fixes(spi-flash, models, clocks, etc) - Add support for OF_SEPARATE configurations - Enabling mini testing with current targets - Add mini mtest configuration - Some minor config setting nand: - arasan: Add subpage configuration net: - gem: Add 64bit DMA support
| * net: zynq_gem: Add check for 64-bit dma support by hardwareSiva Durga Prasad Paladugu2018-12-031-1/+23
| | | | | | | | | | | | | | | | | | | | | | This patch throws an error if 64-bit support is expected but DMA hardware is not capable of 64-bit support. It also prints a debug message if DMA is capable of 64-bit but not using it. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * net: zynq_gem: Added 64-bit addressing supportVipul Kumar2018-12-031-9/+54
| | | | | | | | | | | | | | | | | | | | | | This patch adds 64-bit addressing support for zynq gem. This means it can perform send and receive operations on 64-bit address buffers. Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * arm64: zynqmp: Add new header file for zcu104 RevCT Karthik Reddy2018-12-032-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | Created a new header file for zcu104 RevC board and added below configurations to use MAC address from EEPROM. CONFIG_ZYNQ_GEM_EEPROM_ADDR CONFIG_ZYNQ_EEPROM_BUS Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to xilinx_zynqmp_zcu104_revC_defconfig Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Wire mini-emmc1 configuration with zcu102Michal Simek2018-11-302-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For testing purpose use zcu102 which has SD at controller 1 and this can be used for testing this mini configuration. U-Boot 2018.11-00279-gdc482e7ee092 (Nov 30 2018 - 10:22:56 +0100) Model: ZynqMP MINI EMMC1 Board: Xilinx ZynqMP DRAM: 512 MiB EL Level: EL3 MMC: sdhci@ff170000: 0 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Wire mini-emmc0 configuration with zcu100Michal Simek2018-11-302-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For testing purpose use zcu100 which has SD at controller 0 and this can be used for testing this mini configuration. U-Boot 2018.11-00281-gc5d48466e76e (Nov 30 2018 - 10:41:05 +0100) Model: ZynqMP MINI EMMC0 Board: Xilinx ZynqMP DRAM: 512 MiB EL Level: EL3 MMC: sdhci@ff160000: 0 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Start usb ethernet gadget automaticallyMichal Simek2018-11-301-0/+4
| | | | | | | | | | | | | | | | If only usb ethernet gadget is enabled it can start automatically. If more gagdets are enabled usb ethernet gadget can be bind by "bind /amba/usb1@ff9e0000/dwc3@fe300000 usb_ether" (on zcu100) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add mini mtest configurationMichal Simek2018-11-304-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This configuration is useful when you want to run small u-boot and perform DDR memory test to make sure that DDR is properly configured. It is use for board bringup because alternative u-boot memory tests is quite good. Configuration is running out of OCM. As is done for others mini configurations 0x80 bytes for variables is enough and only default variables are stored there. Alternative memtest is enabled and also 2GB of DDR via DTS files. Configuration is enabling ZYNQMP_PSU_INIT_ENABLED and include psu_init() from zcu102 for testing purpose. In case of size issue this can be moved to SPL configuration as is done for mini_qspi configuration but it is not a problem now. Log: U-Boot 2018.11-00268-gbd58b8ba8915 (Nov 29 2018 - 15:33:35 +0100) Model: ZynqMP MINI Board: Xilinx ZynqMP DRAM: WARNING: Initializing TCM overwrites TCM content 2 GiB EL Level: EL3 In: dcc Out: dcc Err: dcc ZynqMP> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Use minimal size for environment variablesMichal Simek2018-11-304-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason to have huge space for variables because none is using that. But there are some which are setup automatically. baudrate=115200 fdtcontroladdr=ffffa0d0 stderr=dcc stdin=dcc stdout=dcc Environment size: 72/124 bytes Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Do not save variables about boardMichal Simek2018-11-303-3/+0
| | | | | | | | | | | | No reason to save this data to environment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Do not use any EXTRA_ENV_SETTINGSMichal Simek2018-11-291-0/+2
| | | | | | | | | | | | | | No reason to save additional variables to environment for mini configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Disable BOOTCOMMANDMichal Simek2018-11-291-0/+1
| | | | | | | | | | | | | | | | There is no need to waste a space for setting up bootcommand which is passed via xilinx_zynqmp.h by including "config_distro_bootcmd.h" header. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Enable SPL for mini qspi configurationMichal Simek2018-11-292-0/+5
| | | | | | | | | | | | | | | | Wire up mini_qspi SPL with zcu102 for testing purpose. Normally mini u-boot runs with FSBL/SPL for certain board. Enabling SPL and configuration from zcu102 helps with testing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Disable autoboot feature for miniMichal Simek2018-11-294-4/+4
| | | | | | | | | | | | | | There is no reason to have autoboot enabled because it should never start anything automatically. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Disable net for cse nor/nandMichal Simek2018-11-292-2/+2
| | | | | | | | | | | | | | | | | | There is no need to waste 6k if none needs it. zynq_cse_nand : all -6486 bss -20 data -136 rodata -606 text -5724 zynq_cse_nor : all -6486 bss -20 data -136 rodata -606 text -5724 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Enable mtest command at least on one platformMichal Simek2018-11-291-0/+1
| | | | | | | | | | | | | | mtest is being checked by test/py framework and this test should run at least on one platform that's why enabling mtest on zc702. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Wire SPL configuration for cse nor/nand targetsMichal Simek2018-11-292-0/+2
| | | | | | | | | | | | | | These symlinks are here only for testing purpose where SPL is used for soc configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Setup clock-output-names for si570 chipsMichal Simek2018-11-293-0/+6
| | | | | | | | | | | | | | | | | | If there are more instances of si570 clock-output-names property should be used for differentiation of clock output. The patch is adding this optional properties for all zynqmp boards with si570 chip. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Disable ltc2952 poweroff chipMichal Simek2018-11-291-0/+1
| | | | | | | | | | | | | | | | This chip is on the board but handling should be done via firmware not via Linux driver. Changing status property to keep it in the tree to describe it instead of removing this node completely. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Fix sdhci clock in emmc0 mini configurationMichal Simek2018-11-291-0/+1
| | | | | | | | | | | | Add missing clocks property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Wire spi-flash compatible string with flashesMichal Simek2018-11-299-9/+9
| | | | | | | | | | | | | | | | Enable reading tx and rx buswidth from DT via spi-uclass. To get these from uclass spi-flash compatible string has to be added to flash node. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2025-02-02 06:59:04 +0000