summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMarek Vasut <marek.vasut+renesas@gmail.com>2018-12-03 20:55:01 +0100
committerMarek Vasut <marex@denx.de>2018-12-04 09:21:07 +0100
commit750a147b3c73217235681aea4b700f9da181e654 (patch)
tree0055d41e86d1167007ee016c7b73bb148b68e073
parentd2038b26e78bdac0931cf214c9b749fa13e0982c (diff)
downloadu-boot-750a147b3c73217235681aea4b700f9da181e654.tar.gz
u-boot-750a147b3c73217235681aea4b700f9da181e654.tar.xz
u-boot-750a147b3c73217235681aea4b700f9da181e654.zip
ARM: dts: rmobile: Extract SDHI extras on H3 and M3W ULCB
The SDHI nodes are missing features supported in upstream U-Boot, like mode support properties. Pull the extras into U-Boot specific DT until it hits mainline Linux, to make syncing of DTs easier. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> --- V2: Rebase on u-boot/master
-rw-r--r--arch/arm/dts/r8a7795-h3ulcb-u-boot.dts21
-rw-r--r--arch/arm/dts/r8a7796-m3ulcb-u-boot.dts21
-rw-r--r--arch/arm/dts/ulcb.dtsi12
3 files changed, 45 insertions, 9 deletions
diff --git a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts b/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
index 5cb5e9c6fb..ebbd234d78 100644
--- a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
@@ -18,3 +18,24 @@
gpio-sstbz = <&gpio2 3 0>;
};
};
+
+&sdhi2_pins {
+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+ power-source = <1800>;
+};
+
+&sdhi2_pins_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+};
+
+&sdhi0 {
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr104;
+ max-frequency = <208000000>;
+};
+
+&sdhi2 {
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+};
diff --git a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts b/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
index 78bd4f26bd..4e960081f9 100644
--- a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
@@ -18,3 +18,24 @@
gpio-sstbz = <&gpio2 3 0>;
};
};
+
+&sdhi2_pins {
+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+ power-source = <1800>;
+};
+
+&sdhi2_pins_uhs {
+ groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+};
+
+&sdhi0 {
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr104;
+ max-frequency = <208000000>;
+};
+
+&sdhi2 {
+ mmc-hs400-1_8v;
+ max-frequency = <200000000>;
+};
diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi
index c805265343..6f814845f8 100644
--- a/arch/arm/dts/ulcb.dtsi
+++ b/arch/arm/dts/ulcb.dtsi
@@ -299,13 +299,13 @@
};
sdhi2_pins: sd2 {
- groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+ groups = "sdhi2_data8", "sdhi2_ctrl";
function = "sdhi2";
- power-source = <1800>;
+ power-source = <3300>;
};
sdhi2_pins_uhs: sd2_uhs {
- groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
+ groups = "sdhi2_data8", "sdhi2_ctrl";
function = "sdhi2";
power-source = <1800>;
};
@@ -387,12 +387,8 @@
vqmmc-supply = <&vccq_sdhi0>;
cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
bus-width = <4>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
sd-uhs-sdr50;
- sd-uhs-sdr104;
status = "okay";
- max-frequency = <208000000>;
};
&sdhi2 {
@@ -405,10 +401,8 @@
vqmmc-supply = <&reg_1p8v>;
bus-width = <8>;
mmc-hs200-1_8v;
- mmc-hs400-1_8v;
non-removable;
status = "okay";
- max-frequency = <200000000>;
};
&ssi1 {