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* am335x_evm.h: unsed CONFIG_BOOTDELAYTom Rini2016-01-131-4/+0
| | | | | | | Now that ti_armv7_common.h uses config_distro_defaults.h we don't need to include it again and then undef CONFIG_BOOTDELAY Signed-off-by: Tom Rini <trini@konsulko.com>
* ext4_common.c: Clean up failure cases in alloc_triple_indirect_blockTom Rini2016-01-131-5/+10
| | | | | | | | | | As noted by Coverity, when we have an error in alloc_triple_indirect_block we will leak ti_pbuff_start_addr as it's not being freed. Further inspection here shows that we could also leak ti_cbuff_start_addr in one corner case so free that as well. Reported-by: Coverity (CID 131205, 131206) Signed-off-by: Tom Rini <trini@konsulko.com>
* ums: support multiple LUNs at onceStephen Warren2016-01-134-49/+121
| | | | | | | | | | | | | | | Extend the ums command to accept a list of block devices. Each of these will be exported as a separate LUN. An example use-case would be: ums 0 mmc 0,0.1,0.2 ... which would export LUNs for eMMC 0's user data, boot0, and boot1 HW partitions. This is useful since it allows the host access to everything on the eMMC without having to somehow stop the ums command from executing and restart it with different parameters. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: store hwpart in the block deviceStephen Warren2016-01-137-47/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow us to have multiple block device structs each referring to the same eMMC device, yet different HW partitions. For now, there is still a single block device per eMMC device. As before, this block device always accesses whichever HW partition was most recently selected. Clients wishing to make use of multiple block devices referring to different HW partitions can simply take a copy of this block device once it points at the correct HW partition, and use each one as they wish. This feature will be used by the next patch. In the future, perhaps get_device() could be enhanced to return a dynamically allocated block device struct, to avoid the client needing to copy it in order to maintain multiple block devices. However, this would require all users to be updated to free those block device structs at some point, which is rather a large change. Most callers of mmc_switch_part() wish to permanently switch the default MMC block device's HW partition. Enhance mmc_switch_part() so that it does this. This removes the need for callers to do this. However, common/env_mmc.c needs to save and restore the current HW partition. Make it do this more explicitly. Replace use of mmc_switch_part() with mmc_select_hwpart() in order to remove duplicate code that skips the call if that HW partition is already selected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* block: pass block dev not num to read/write/erase()Stephen Warren2016-01-1341-194/+224
| | | | | | | | | | | This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: move gd handling outside of C codeAlbert ARIBAUD2016-01-133-15/+22
| | | | | | | | | | | | | | | | | | As of gcc 5.2.1 for Thumb-1, it is not possible any more to assign gd from C code, as gd is mapped to r9, and r9 may now be saved in the prolog sequence, and restored in the epilog sequence, of any C functions. Therefore arch_setup_gd(), which is supposed to set r9, may actually have no effect, causing U-Boot to use a bad address to access GD. Fix this by never calling arch_setup_gd() for ARM, and instead setting r9 in arch/arm/lib/crt0.S, to the value returned by board_init_f_alloc_reserve(). Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reviewed-by: Simon Glass <sjg@chromium.org>
* Fix board init code to respect the C runtime environmentAlbert ARIBAUD2016-01-1310-49/+144
| | | | | | | | | | | | | board_init_f_mem() alters the C runtime environment's stack it is actually already using. This is not a valid behaviour within a C runtime environment. Split board_init_f_mem into C functions which do not alter their own stack and always behave properly with respect to their C runtime environment. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Thomas Chou <thomas@wytron.com.tw>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-01-1320-3/+26
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| * arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configsNathan Rossi2016-01-136-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This feature is required in SPL to enable support for loading from SPI flash. Also clean up the #define in socfpga_common.h. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm: mvebu: Select SPL_DM_SEQ_ALIASNathan Rossi2016-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Select SPL_DM_SEQ_ALIAS which is required for certain uclasses, specifically SPI Flash. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configsNathan Rossi2016-01-1310-0/+10
| | | | | | | | | | | | | | | | | | This feature is required in SPL to enable support for loading from SPI flash when the device is booted from QSPI. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * spl: dm: Add SPL_DM_SEQ_ALIAS config optionNathan Rossi2016-01-133-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Device Model sequence alias feature is required by some Uclasses. Instead of disabling the feature for all SPL targets allow it to be configured. The config option is disabled by default to reduce code size for targets that are not interested or do not require this feature. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge git://git.denx.de/u-boot-netTom Rini2016-01-135-148/+42
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| * | net: e1000: Mark _disable_wr() and _write_status() as __maybe_unusedBin Meng2015-12-211-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Per the comments, e1000_spi_eeprom_disable_wr() and e1000_spi_eeprom_write_status() have been tested. Remove the #if 0, #endif and mark them as __maybe_unused. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: e1000: Remove CONFIG_MVBC_1GBin Meng2015-12-211-2/+0
| | | | | | | | | | | | | | | | | | | | | CONFIG_MVBC_1G is not referenced anywhere, hence remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: e1000: Remove dead codes wrapped by #if 0Bin Meng2015-12-212-105/+1
| | | | | | | | | | | | | | | | | | | | | Remove those dead codes wrapped by #if 0 and #endif. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | include: net: Simplify the usage of __always_inlineFabio Estevam2015-12-211-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit de4d2e9e7ce0f9 (" bitops: Add fls_long and __ffs64") <linux/compiler.h> is included in include/linux/bitops.h, which allows us to marking a function as 'always_inline' in a simpler format. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | fdt: Rewrite the logic in fdt_fixup_ethernet()Bin Meng2015-12-211-21/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently in fdt_fixup_ethernet() the MAC address fix up is handled in a loop of which the exit condition is to test the "eth%daddr" env is not NULL. However this creates unnecessary constrains that those "eth%daddr" env variables must be sequential even if "ethernet%d" does not start from 0 in the "/aliases" node. For example, with "/aliases" node below: aliases { ethernet3 = &enet3; ethernet4 = &enet4; }; "ethaddr", "eth1addr", "eth2addr" must exist in order to fix up ethernet3's MAC address successfully. Now we change the loop logic to iterate the properties in the "/aliases" node. For each property, test if it is in a format of "ethernet%d", then get its MAC address from corresponding "eth%daddr" env and fix it up in the dtb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> On OMAP4 Panda (+v4.3 kernel) Tested-by: Tom Rini <trini@konsulko.com>
| * | fdt: Deprecate "usbethaddr" usage in fdt_fixup_ethernet()Bin Meng2015-12-211-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In fdt_fixup_ethernet() only "usbethaddr" is handled to fix up the first usb ethernet port MAC address. Other additional usb ethernet ports are ignored as there is no logic to handle "usbeth%daddr". It is suggested we should use "ethaddr" for all ethernet devices. Hence deprecate "usbethaddr" usage in fdt_fixup_ethernet(). This actually reverts commit b1f49ab8c7bad60426b30c134ae065ef77d2dfc1 "ARM: fdt support: Add usbethaddr as an acceptable MAC". Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> On OMAP4 Panda (+ v4.3 kernel) Tested-by: Tom Rini <trini@konsulko.com>
* | | hash.c: Conditionally compile hash_command, static hash_showTom Rini2016-01-132-38/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function hash_show is now only called by hash_command, so mark it as static (and drop from hash.h). We only call hash_command when any of CONFIG_CMD_CRC32, CONFIG_CMD_SHA1SUM or CONFIG_CMD_HASH are set. Since hash.c is linked in unconditionally we must take extra care with functions that bring in read-only strings as these will not be discarded. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | part_dos.c: Don't wrap to negative after 2G sectorsStefan Monnier2016-01-132-16/+21
| | | | | | | | | | | | | | | | | | | | | | | | In order to support large IDE disks we need to make certain types be lbaint_t now. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Monnier <monnier@iro.umontreal.ca>
* | | image: check "bootm_low" and "bootm_size" if "initrd_high" is missingMasahiro Yamada2016-01-131-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To boot Linux, we should prevent Initramdisk and FDT from going too high. Currently, boot_relocate_fdt() checks "fdt_high" environment first, and then falls back to getenv_bootm_mapsize() + getenv_bootm_low() if "fdt_high" is missing. On the other hand, boot_ramdisk_high() only checks "initrd_high" to get the address limit for the Initramdisk. We also want to let this case fall back to getenv_bootm_mapsize() + getenv_bootm_low(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | dm: core: Add a new api to get indexed device addressMugunthan V N2016-01-132-4/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add new api to get device address based on index. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Jagan Teki <jteki@openedev.com> [Rebased on master] Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | power: pmic.h: Drop include <spi.h>Jagan Teki2016-01-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | include/power/pmic.h never used any generic spi code from include/spi.h, but this has been added in below commit. "dm: pmic: add implementation of driver model pmic uclass" (sha1: 4d9057e82be11a862db411c4867e859fe0d4ca2a) Adding functionalities in include/spi.h will trigger a build issue as this been added used in include/power/pmic.h Build issue on trats2 with adding BIT macro on spi.h: ---------------------------------------------------- CC lib/asm-offsets.s In file included from include/power/pmic.h:15:0, from include/power/max77686_pmic.h:11, from include/configs/trats2.h:212, from include/config.h:5, from include/common.h:18, from lib/asm-offsets.c:15: include/spi.h: In function 'spi_w8r8': include/spi.h:327:2: warning: implicit declaration of function 'BIT' [-Wimplicit-function-declaration] Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | defconfig: am437x_sk_evm: enable spi driver modelMugunthan V N2016-01-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable spi driver model for am437x_sk_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | arm: dts: am4372: add qspi register maps for memory mapMugunthan V N2016-01-131-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Add qspi memory map address to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | am43xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for splMugunthan V N2016-01-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | defconfig: dra74_evm: enable spi driver modelMugunthan V N2016-01-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable spi driver model for dra74_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | defconfig: dra72_evm: enable spi driver modelMugunthan V N2016-01-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable mmc driver model for dra72_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | arm: dts: dra72-evm: add spi-flash comaptible for flashMugunthan V N2016-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | arm: dts: dra7-evm: add spi-flash comaptible for flashMugunthan V N2016-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | arm: dts: am437x-gp-evm: add spi-flash comaptible for flashMugunthan V N2016-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | arm: dts: dra7: add qspi register maps for memory map and control moduleMugunthan V N2016-01-131-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Add qspi memory map and control module register maps to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | drivers: spi: ti_qspi: convert driver to adopt device driver modelMugunthan V N2016-01-131-0/+187
| | | | | | | | | | | | | | | | | | | | | | | | | | | adopt ti_qspi driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | dts: dra7: add spi alias for qspiMugunthan V N2016-01-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | add spi alias for qspi so that spi probes the device and driver successfully. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for splMugunthan V N2016-01-131-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | spi: Add support for dual and quad modeMugunthan V N2016-01-132-1/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi bus can support dual and quad wire data transfers for tx and rx. So defining dual and quad modes for both tx and rx. Also add support to parse bus width used for spi tx and rx transfers. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | drivers: spi: ti_qspi: prepare driver for DM conversionMugunthan V N2016-01-131-126/+153
| | | | | | | | | | | | | | | | | | | | | Prepare driver for DM conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model ↵Mugunthan V N2016-01-131-60/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | conversion Changing the ti_qspi_priv structure and its instance names from to priv for driver mode conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | drivers: spi: ti_qspi: do not hard code chip select for memory map configurationMugunthan V N2016-01-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable memory map in dra7xx, specific chip select must be written to control module register. But this hard coded to chip select 1, fixing it by writing the specific chip select value to control module register. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* | | spi: Add SPI_TX_DUAL modeJagan Teki2016-01-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Added SPI_TX_DUAL mode flag. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | sf: Make IO modes at last in read modesJagan Teki2016-01-133-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Minor cleanupJagan Teki2016-01-131-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add comments on mode_rx - Tab space's Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Use BIT macroJagan Teki2016-01-131-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Fix bit assignment with flagsJagan Teki2016-01-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixed bit assignment with flags members on spi_slave{} Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Move flags macro's to spi_slave{} membersJagan Teki2016-01-131-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves flags macro's to respective member position on spi_slave{}, for better readabilty and finding the respective member macro's easily. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Rename op_mode_rx to mode_rxJagan Teki2016-01-134-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since spi rx mode macro's are renamed to simple and meaninfull, this patch will rename the respective structure members. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Rename SPI_OPM_RX_* to SPI_RX_*Jagan Teki2016-01-133-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Remove SPI_OPM_RX_DIO|QIOFJagan Teki2016-01-131-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO commands/opmodes for dual and quad. Usually IO operation's are referred to flash protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* | | spi: Remove SPI_OPM_RX_EXTNJagan Teki2016-01-131-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI_OPM_RX_EXTN is a combination of all rx opmode's and spi driver shall use any one of the rx mode at a time not the combination and it is true in case of flash where spi_flash_table mention combination of supported read opmodes so-that the required one will pick based on the rx mode from spi driver. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
generated by cgit (git 2.34.1) at 2024-11-19 06:40:08 +0000