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| author | Nathan Rossi <nathan@nathanrossi.com> | 2016-01-08 03:00:48 +1000 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2016-01-13 13:20:03 +0100 |
| commit | fc82edd8440721aadf3bfc784f29a513ad7680be (patch) | |
| tree | 038d1122c95678ff1216150dca99c700e77ec9cd | |
| parent | 47c0d79edc35fdd959851abcb3332bd5e702d0eb (diff) | |
| download | u-boot-fc82edd8440721aadf3bfc784f29a513ad7680be.tar.gz u-boot-fc82edd8440721aadf3bfc784f29a513ad7680be.tar.xz u-boot-fc82edd8440721aadf3bfc784f29a513ad7680be.zip | |
arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configs
This feature is required in SPL to enable support for loading from SPI
flash.
Also clean up the #define in socfpga_common.h.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin-Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| -rw-r--r-- | configs/socfpga_arria5_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_cyclone5_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_sockit_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_socrates_defconfig | 1 | ||||
| -rw-r--r-- | configs/socfpga_sr1500_defconfig | 1 | ||||
| -rw-r--r-- | include/configs/socfpga_common.h | 1 |
6 files changed, 5 insertions, 1 deletions
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 68d12df404..6e8976fcc3 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index accee924a3..e31aa71689 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index b4f41a939d..59fbb2c3c1 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index fe940f967a..aaba8cb29d 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y CONFIG_SPL_STACK_R_ADDR=0x00800000 CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 3d98a636d9..a4f0835e9d 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -6,6 +6,7 @@ CONFIG_DM_GPIO=y CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_SPL=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_ADDR=0x00800000 # CONFIG_CMD_IMLS is not set diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a09e906a6b..8de0ab9046 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -370,7 +370,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT -#define CONFIG_DM_SEQ_ALIAS 1 #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 |