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* arm: Remove cgtqmx6eval boardTom Rini2021-04-108-1503/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove titanium boardTom Rini2021-04-108-722/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove ts4800 boardTom Rini2021-04-108-472/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Lucile Quirion <lucile.quirion@savoirfairelinux.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove mx53evk boardTom Rini2021-04-108-542/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Jason Liu <jason.hui.liu@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove pfla02 boardTom Rini2021-04-108-978/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove zc5202 and zc5601 boardsTom Rini2021-04-109-867/+0
| | | | | | | | These boards have not been converted to CONFIG_DM_MMC by the deadline. Remove them. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove xpress boardTom Rini2021-04-109-772/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove kc1 boardTom Rini2021-04-108-500/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove am3517_crane boardTom Rini2021-04-108-725/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Nagendra T S <nagendra@mistralsolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove omap3_ha boardTom Rini2021-04-109-938/+0
| | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Cc: Tapani Utriainen <linuxfae@technexion.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove tricorder boardTom Rini2021-04-1012-1287/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Thomas Weber <weber@corscience.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove platinum_picon boardTom Rini2021-04-1015-1557/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove Broadcom Cygnus boardsTom Rini2021-04-1018-339/+1
| | | | | | | | These boards have not been converted to CONFIG_DM by the deadline. Remove them. Cc: Steve Rae <steve.rae@raedomain.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove bcm23550_w1d boardTom Rini2021-04-107-305/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Steve Rae <steve.rae@raedomain.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove bcm28155_ap boardTom Rini2021-04-1010-427/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Steve Rae <steve.rae@raedomain.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove picosam9g45 boardTom Rini2021-04-108-576/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Erik van Luijk <evanluijk@interact.nl> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove wb50n boardTom Rini2021-04-107-386/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove wb45n boardTom Rini2021-04-107-403/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Ben Whitten <ben.whitten@lairdtech.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove bcm958712k boardTom Rini2021-04-107-146/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove s32v234evb boardTom Rini2021-04-1025-2707/+2
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Eddy Petrișor <eddy.petrisor@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove secomx6quq7 boardTom Rini2021-04-1011-702/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove vexpress_ca15_tc2 boardTom Rini2021-04-1021-2770/+1
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove apf27 boardTom Rini2021-04-1012-1529/+1
| | | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove ts4600 boardTom Rini2021-04-108-361/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove sc_sps_1 boardTom Rini2021-04-108-382/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove SANSA_FUZE_PLUS boardTom Rini2021-04-108-650/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove xfi3 boardTom Rini2021-04-108-474/+0
| | | | | | | | This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* drivers: ata: Remove mvsata_ide driverTom Rini2021-04-1025-276/+0
| | | | | | | | The mvsata_ide driver was due for DM conversion by v2019.07. As that has long passed, remove the driver and disable it in the boards which had enabled it. Signed-off-by: Tom Rini <trini@konsulko.com>
* ppc: Remove MPC8349ITX boardTom Rini2021-04-1011-1745/+0
| | | | | | | | | This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove this board. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Remove ot1200 boardTom Rini2021-04-1011-945/+0
| | | | | | | | | | | This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. In order to convert to using the DWC SATA driver under DM further migrations are required. Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* arm: Remove dms-ba16 boardTom Rini2021-04-1014-1273/+0
| | | | | | | | | | | This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove this board. Cc: Akshay Bhat <akshaybhat@timesys.com> Cc: Ken Lin <Ken.Lin@advantech.com.tw> Signed-off-by: Tom Rini <trini@konsulko.com>
* ata: DWC_AHSATA depends on BLKTom Rini2021-04-101-0/+1
| | | | | | | The dwc ahsata driver is written such that CONFIG_BLK must be enabled, add this as a dependency in Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
* am57xx_hs_evm_usb: Enable AHCI and BLKTom Rini2021-04-101-1/+1
| | | | | | | | | Enable the AHCI and BLK features to complete migration of various drivers. Cc: Andrew F. Davis <afd@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* ls1012aqds_tfa_SECURE_BOOT: Remove unused CONFIG_SCSI_AHCITom Rini2021-04-101-1/+0
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'u-boot-stm32-20210409' of ↵Tom Rini2021-04-0951-513/+3085
|\ | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
| * arm: stm32mp1: Set soc_type, soc_pkg, soc_rev env variablesMarek Vasut2021-04-091-52/+53
| | | | | | | | | | | | | | | | | | | | | | Split up get_soc_name(), clean the decoding up a bit, and set up environment variables which contain the SoC type, package, revision. This is useful on SoMs, where multiple SoC options are populated. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * configs: stm32mp1: Fix misleading SPL size limitationsAlexandru Gagniuc2021-04-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A now removed comment promises to "limit SYSRAM usage to first 128 KB". This would imply that only SYSRAM from 0x2ffc0000 - 0x2ffe0000 would be used. This is not what happens at all. First, SPL_MAX_SIZE is referenced from SPL_TEXT_BASE, which on all existing configs is set to 0x2ffc2500, not SYSRAM_BASE (0x2ffc0000). Some of it is in the first 128 KiB and some of it is in the second 128 KiB chunk of SYSRAM. Second, SPL_MAX_SIZE, does not restrict the BSS size. While a valiant attempt is made via SPL_BSS_MAX_SIZE, the value of 0x00100000 is much larger than SYSRAM, and doesn't account for the non-BSS sections. Because we're putting the .text and .bss in the same boat, the correct way to limit them together is via SPL_MAX_FOOTPRINT. With the current SPL_TEXT_BASE, we couldn't limit even a very basic SPL to the first 128 KiB, and there is no technical reason to do so. Because of this, simply allow the SPL to use all SYSRAM. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * configs: stm32mp1: Remove misleading CONFIG_SPL_BSS_START_ADDRAlexandru Gagniuc2021-04-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts. stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds, which does not make use of this definition. The SPL BSS starts in SRAM, right after .text, .rodata, .data, and .u_boot_list. A very short version of the STM32MP1 memory map is: * SYSRAM: 2ffc0000 - 30000000 <- all of SPL is here * DRAM: c0000000+ 0xC0200000 is a DRAM address, and has nothing to do with SPL. It is just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to have it at all. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * configs: stm32mp1: stm32mp1: Increase SPL malloc() sizeAlexandru Gagniuc2021-04-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images"), FIT images must be malloc()'d before being loaded. The old size of 1 MiB is suitable for FIT images with u-boot and an FDT, but something containing a linux kernel is almost sure to fail. It's safe to extend malloc all the way to 0xc2000000, but no further. Linux likes to be loaded at 0xc2000000, so we use that as our cutoff point. This gives us 29 MiB of malloc() space, which suited for more complex FIT images including several DTBs, kernel, and OP-TEE images. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * stm32mp1: remove the board_check_usb_power function when ADC is not activatedPatrick Delaunay2021-04-091-5/+4
| | | | | | | | | | | | | | | | | | | | Simplify the code of the function board_check_usb_power based in CONFIG_ADC and adc_measurement; the function is removed by the linker when the CONFIG_ADC is not activated. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * stm32mp: replace printf by log macro in setup_boot_modePatrick Delaunay2021-04-091-5/+5
| | | | | | | | | | | | | | | | Replace the remaining printf in setup_boot_mode() by log macro to handle filtering for log features. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * stm32mp: update uart number in trace of serial device not foundPatrick Delaunay2021-04-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Align the uart number in the trace of setup_boot_mode() with the name of the uart/usart device (start at 1) and not with the instance value (start at 0), i.e. the serial device sequence number and the index in serial_addr[]. Fixes: f49eb16c17e2c ("stm32mp: stm32prog: replace alias by serial device sequence number") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * stm32mp: stm32prog: add FIP header supportPatrick Delaunay2021-04-094-37/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of TF-A FIP header in command stm32prog for all the boot partition and not only the STM32IMAGE. This patch is a preliminary patch to support FIP as second boot stage after TF-A BL2 when CONFIG_TFABOOT is activated for trusted boot chain. The FIP is archive binary loaded by TF-A BL2, which contains the secure OS = OP-TEE and the non secure firmware and device tree = U-Boot. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OFJagan Teki2021-04-096-0/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 7" OF is a capacitive touch 7" Open Frame panel solutions with - 7" AUO B101AW03 LVDS panel - EDT, FT5526 Touch MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7" Open Frame Solution board. Linux dts commit details: commit <1d278204cbaa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 boardJagan Teki2021-04-098-1/+332
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroDev 2.0 is a general purpose miniature carrier board with CAN, LTE and LVDS panel interfaces. Genaral features: - Ethernet 10/100 - USB Type A - Audio Out - microSD - LVDS panel connector - Wifi/BT (option) - UMTS LTE with sim connector (option) MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board. Linux dts commit details: commit <f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 Micro SoMJagan Teki2021-04-091-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroGEA STM32MP1 is a STM32MP157A based Micro SoM. General features: - STM32MP157AAC - Up to 1GB DDR3L-800 - 512MB Nand flash - I2S MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier boards for creating complete platform solutions. Linux dts commit details: commit <0be81dfaeaf8> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoM") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * board: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0Jagan Teki2021-04-096-0/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier board. Genaral features: - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Carrier board for creating complete i.Core STM32MP1 C.TOUCH 2.0 board. Linux dts commit details: commit <6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * board: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter KitJagan Teki2021-04-0911-1/+547
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam. i.Core STM32MP1 needs to mount on top of this Evaluation board for creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit. Linux dts commit details: commit <adc0496104b6> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit") Add support for it. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * ARM: stm32: Imply SPL_SPI_LOADJagan Teki2021-04-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | SPI Load isn't mandatory for STM32 builds. Let's imply instead of select it to get rid of build issues for non-SPI defconfigs. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| * ARM: dts: stm32: Add Engicam i.Core STM32MP1 1X4Gb DDR3Jagan Teki2021-04-091-0/+119
| | | | | | | | | | | | | | | | | | | | | | Engicam i.Core STM32MP1 SODIMM SoM has mounted 1x4Gb DDR3 which has 32bits width 528000Khz frequency. Add DDR configuration via dtsi. Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit (git 2.34.1) at 2024-11-12 11:04:56 +0000