diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-generic/global_data.h | 24 | ||||
| -rw-r--r-- | include/clk-uclass.h | 8 | ||||
| -rw-r--r-- | include/clk.h | 28 | ||||
| -rw-r--r-- | include/configs/am65x_evm.h | 6 | ||||
| -rw-r--r-- | include/configs/k2g_evm.h | 2 | ||||
| -rw-r--r-- | include/configs/nokia_rx51.h | 17 | ||||
| -rw-r--r-- | include/configs/pdu001.h | 3 | ||||
| -rw-r--r-- | include/dm/read.h | 24 | ||||
| -rw-r--r-- | include/dt-bindings/bus/ti-sysc.h | 6 | ||||
| -rw-r--r-- | include/linux/clk-provider.h | 57 |
10 files changed, 160 insertions, 15 deletions
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 31e249177c..efa09a1943 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -184,6 +184,12 @@ struct global_data { #ifdef CONFIG_DM /** + * @dm_flags: additional flags for Driver Model + * + * See &enum gd_dm_flags + */ + unsigned long dm_flags; + /** * @dm_root: root instance for Driver Model */ struct udevice *dm_root; @@ -471,6 +477,12 @@ struct global_data { #define gd_acpi_ctx() NULL #endif +#if CONFIG_IS_ENABLED(DM) +#define gd_size_cells_0() (gd->dm_flags & GD_DM_FLG_SIZE_CELLS_0) +#else +#define gd_size_cells_0() (0) +#endif + /** * enum gd_flags - global data flags * @@ -555,6 +567,18 @@ enum gd_flags { GD_FLG_SMP_READY = 0x40000, }; +/** + * enum gd_dm_flags - global data flags for Driver Model + * + * See field dm_flags of &struct global_data. + */ +enum gd_dm_flags { + /** + * @GD_DM_FLG_SIZE_CELLS_0: Enable #size-cells=<0> translation + */ + GD_DM_FLG_SIZE_CELLS_0 = 0x00001, +}; + #endif /* __ASSEMBLY__ */ #endif /* __ASM_GENERIC_GBL_DATA_H */ diff --git a/include/clk-uclass.h b/include/clk-uclass.h index dac42dab36..50e8681b55 100644 --- a/include/clk-uclass.h +++ b/include/clk-uclass.h @@ -62,6 +62,14 @@ struct clk_ops { */ int (*rfree)(struct clk *clock); /** + * round_rate() - Adjust a rate to the exact rate a clock can provide. + * + * @clk: The clock to manipulate. + * @rate: Desidered clock rate in Hz. + * @return rounded rate in Hz, or -ve error code. + */ + ulong (*round_rate)(struct clk *clk, ulong rate); + /** * get_rate() - Get current clock rate. * * @clk: The clock to query. diff --git a/include/clk.h b/include/clk.h index a62e2efa2c..ca6b85fa6f 100644 --- a/include/clk.h +++ b/include/clk.h @@ -367,6 +367,29 @@ struct clk *clk_get_parent(struct clk *clk); long long clk_get_parent_rate(struct clk *clk); /** + * clk_round_rate() - Adjust a rate to the exact rate a clock can provide + * + * This answers the question "if I were to pass @rate to clk_set_rate(), + * what clock rate would I end up with?" without changing the hardware + * in any way. In other words: + * + * rate = clk_round_rate(clk, r); + * + * and: + * + * rate = clk_set_rate(clk, r); + * + * are equivalent except the former does not modify the clock hardware + * in any way. + * + * @clk: A clock struct that was previously successfully requested by + * clk_request/get_by_*(). + * @rate: desired clock rate in Hz. + * @return rounded rate in Hz, or -ve error code. + */ +ulong clk_round_rate(struct clk *clk, ulong rate); + +/** * clk_set_rate() - Set current clock rate. * * @clk: A clock struct that was previously successfully requested by @@ -482,6 +505,11 @@ static inline long long clk_get_parent_rate(struct clk *clk) return -ENOSYS; } +static inline ulong clk_round_rate(struct clk *clk, ulong rate) +{ + return -ENOSYS; +} + static inline ulong clk_set_rate(struct clk *clk, ulong rate) { return -ENOSYS; diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 9eed0ea203..b39a5b4ca4 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -56,6 +56,12 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #endif +/* + * If the maximum size is not declared then it is defined as + * CONFIG_SYS_DFU_DATA_BUF_SIZE. + */ +#define CONFIG_SYS_DFU_MAX_FILE_SIZE (1024 * 1024 * 8) /* 8 MiB */ + #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE #define CONFIG_SYS_BOOTM_LEN SZ_64M diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h index 83466b9e0c..4471eb4f6a 100644 --- a/include/configs/k2g_evm.h +++ b/include/configs/k2g_evm.h @@ -35,6 +35,8 @@ "setenv name_fdt keystone-k2g-evm.dtb; " \ "else if test $board_name = 66AK2GIC; then " \ "setenv name_fdt keystone-k2g-ice.dtb; " \ + "else if test $board_name = 66AK2GI1; then " \ + "setenv name_fdt keystone-k2g-ice.dtb; " \ "else if test $name_fdt = undefined; then " \ "echo WARNING: Could not determine device tree to use;"\ "fi;fi;fi;fi; setenv fdtfile ${name_fdt}\0" \ diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 6879f52a0c..3f2700d8e2 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -169,8 +169,6 @@ int rx51_kp_getc(struct stdio_dev *sdev); "trymmcboot=if run switchmmc; then " \ "setenv mmctype fat;" \ "run trymmcallpartboot;" \ - "setenv mmctype ext2;" \ - "run trymmcallpartboot;" \ "setenv mmctype ext4;" \ "run trymmcallpartboot;" \ "fi\0" \ @@ -179,19 +177,10 @@ int rx51_kp_getc(struct stdio_dev *sdev); "preboot=setenv mmcnum 1; setenv mmcpart 1;" \ "setenv mmcscriptfile bootmenu.scr;" \ "if run switchmmc; then " \ - "setenv mmcdone true;" \ "setenv mmctype fat;" \ - "if run scriptload; then true; else " \ - "setenv mmctype ext2;" \ - "if run scriptload; then true; else " \ - "setenv mmctype ext4;" \ - "if run scriptload; then true; else " \ - "setenv mmcdone false;" \ - "fi;" \ - "fi;" \ - "fi;" \ - "if ${mmcdone}; then " \ - "run scriptboot;" \ + "if run scriptload; then run scriptboot; else " \ + "setenv mmctype ext4;" \ + "if run scriptload; then run scriptboot; fi;" \ "fi;" \ "fi;" \ "if run slide; then true; else " \ diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h index e4b14c5ecd..53342ce193 100644 --- a/include/configs/pdu001.h +++ b/include/configs/pdu001.h @@ -37,9 +37,10 @@ #define CONFIG_BOOTCOMMAND \ "run eval_boot_device;" \ + "part uuid mmc ${mmc_boot}:${root_fs_partition} root_fs_partuuid;" \ "setenv bootargs console=${console} " \ "vt.global_cursor_default=0 " \ - "root=/dev/mmcblk${mmc_boot}p${root_fs_partition} " \ + "root=PARTUUID=${root_fs_partuuid} " \ "rootfstype=ext4 " \ "rootwait " \ "rootdelay=1;" \ diff --git a/include/dm/read.h b/include/dm/read.h index fc987f7759..c875e11a13 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -678,6 +678,23 @@ int dev_get_child_count(const struct udevice *dev); */ int dev_read_pci_bus_range(const struct udevice *dev, struct resource *res); +/** + * dev_decode_display_timing() - decode display timings + * + * Decode display timings from the supplied 'display-timings' node. + * See doc/device-tree-bindings/video/display-timing.txt for binding + * information. + * + * @dev: device to read DT display timings from. The node linked to the device + * contains a child node called 'display-timings' which in turn contains + * one or more display timing nodes. + * @index: index number to read (0=first timing subnode) + * @config: place to put timings + * @return 0 if OK, -FDT_ERR_NOTFOUND if not found + */ +int dev_decode_display_timing(const struct udevice *dev, int index, + struct display_timing *config); + #else /* CONFIG_DM_DEV_READ_INLINE is enabled */ static inline int dev_read_u32(const struct udevice *dev, @@ -1000,6 +1017,13 @@ static inline int dev_get_child_count(const struct udevice *dev) return ofnode_get_child_count(dev_ofnode(dev)); } +static inline int dev_decode_display_timing(const struct udevice *dev, + int index, + struct display_timing *config) +{ + return ofnode_decode_display_timing(dev_ofnode(dev), index, config); +} + #endif /* CONFIG_DM_DEV_READ_INLINE */ /** diff --git a/include/dt-bindings/bus/ti-sysc.h b/include/dt-bindings/bus/ti-sysc.h index 2c005376ac..eae4274543 100644 --- a/include/dt-bindings/bus/ti-sysc.h +++ b/include/dt-bindings/bus/ti-sysc.h @@ -15,6 +15,12 @@ /* SmartReflex sysc found on 36xx and later */ #define SYSC_OMAP3_SR_ENAWAKEUP (1 << 26) +#define SYSC_DRA7_MCAN_ENAWAKEUP (1 << 4) + +/* PRUSS sysc found on AM33xx/AM43xx/AM57xx */ +#define SYSC_PRUSS_SUB_MWAIT (1 << 5) +#define SYSC_PRUSS_STANDBY_INIT (1 << 4) + /* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */ #define SYSC_IDLE_FORCE 0 #define SYSC_IDLE_NO 1 diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 75b16353da..c871ea646d 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -76,6 +76,19 @@ struct clk_mux { extern const struct clk_ops clk_mux_ops; u8 clk_mux_get_parent(struct clk *clk); +/** + * clk_mux_index_to_val() - Convert the parent index to the register value + * + * It returns the value to write in the hardware register to output the selected + * input clock parent. + * + * @table: array of register values corresponding to the parent index (optional) + * @flags: hardware-specific flags + * @index: parent clock index + * @return the register value + */ +unsigned int clk_mux_index_to_val(u32 *table, unsigned int flags, u8 index); + struct clk_gate { struct clk clk; void __iomem *reg; @@ -125,6 +138,50 @@ struct clk_divider { #define CLK_DIVIDER_READ_ONLY BIT(5) #define CLK_DIVIDER_MAX_AT_ZERO BIT(6) extern const struct clk_ops clk_divider_ops; + +/** + * clk_divider_get_table_div() - convert the register value to the divider + * + * @table: array of register values corresponding to valid dividers + * @val: value to convert + * @return the divider + */ +unsigned int clk_divider_get_table_div(const struct clk_div_table *table, + unsigned int val); + +/** + * clk_divider_get_table_val() - convert the divider to the register value + * + * It returns the value to write in the hardware register to divide the input + * clock rate by @div. + * + * @table: array of register values corresponding to valid dividers + * @div: requested divider + * @return the register value + */ +unsigned int clk_divider_get_table_val(const struct clk_div_table *table, + unsigned int div); + +/** + * clk_divider_is_valid_div() - check if the divider is valid + * + * @table: array of valid dividers (optional) + * @div: divider to check + * @flags: hardware-specific flags + * @return true if the divider is valid, false otherwise + */ +bool clk_divider_is_valid_div(const struct clk_div_table *table, + unsigned int div, unsigned long flags); + +/** + * clk_divider_is_valid_table_div - check if the divider is in the @table array + * + * @table: array of valid dividers + * @div: divider to check + * @return true if the divider is found in the @table array, false otherwise + */ +bool clk_divider_is_valid_table_div(const struct clk_div_table *table, + unsigned int div); unsigned long divider_recalc_rate(struct clk *hw, unsigned long parent_rate, unsigned int val, const struct clk_div_table *table, |