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-rw-r--r--board/gdsys/common/Makefile5
-rw-r--r--board/gdsys/common/adv7611.c180
-rw-r--r--board/gdsys/common/adv7611.h12
-rw-r--r--board/gdsys/common/ch7301.c67
-rw-r--r--board/gdsys/common/ch7301.h12
-rw-r--r--board/gdsys/common/fanctrl.c35
-rw-r--r--board/gdsys/common/fanctrl.h12
-rw-r--r--board/gdsys/common/mclink.c141
-rw-r--r--board/gdsys/common/mclink.h14
-rw-r--r--board/gdsys/common/phy.c278
-rw-r--r--board/gdsys/common/phy.h13
11 files changed, 0 insertions, 769 deletions
diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index 7dfe104561..dd6d5e69de 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -6,11 +6,6 @@
obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o
obj-$(CONFIG_CMD_IOLOOP) += cmd_ioloop.o
obj-$(CONFIG_CONTROLCENTERD) += dp501.o
-obj-$(CONFIG_TARGET_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o fanctrl.o
-obj-$(CONFIG_TARGET_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
-obj-$(CONFIG_TARGET_STRIDER) += fanctrl.o
-obj-$(CONFIG_STRIDER_CON) += osd.o
-obj-$(CONFIG_STRIDER_CON_DP) += osd.o
obj-$(CONFIG_TARGET_GAZERBEAM) += osd.o ihs_mdio.o ioep-fpga.o
ifdef CONFIG_OSD
diff --git a/board/gdsys/common/adv7611.c b/board/gdsys/common/adv7611.c
deleted file mode 100644
index 06cdc05825..0000000000
--- a/board/gdsys/common/adv7611.c
+++ /dev/null
@@ -1,180 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-
-#include <common.h>
-#include <i2c.h>
-
-#define ADV7611_I2C_ADDR 0x4c
-#define ADV7611_RDINFO 0x2051
-
-/*
- * ADV7611 I2C Addresses in u-boot notation
- */
-enum {
- CP_I2C_ADDR = 0x22,
- DPLL_I2C_ADDR = 0x26,
- KSV_I2C_ADDR = 0x32,
- HDMI_I2C_ADDR = 0x34,
- EDID_I2C_ADDR = 0x36,
- INFOFRAME_I2C_ADDR = 0x3e,
- CEC_I2C_ADDR = 0x40,
- IO_I2C_ADDR = ADV7611_I2C_ADDR,
-};
-
-/*
- * Global Control Registers
- */
-enum {
- IO_RD_INFO_MSB = 0xea,
- IO_RD_INFO_LSB = 0xeb,
- IO_CEC_ADDR = 0xf4,
- IO_INFOFRAME_ADDR = 0xf5,
- IO_DPLL_ADDR = 0xf8,
- IO_KSV_ADDR = 0xf9,
- IO_EDID_ADDR = 0xfa,
- IO_HDMI_ADDR = 0xfb,
- IO_CP_ADDR = 0xfd,
-};
-
-int adv7611_i2c[] = CONFIG_SYS_ADV7611_I2C;
-
-int adv7611_probe(unsigned int screen)
-{
- int old_bus = i2c_get_bus_num();
- unsigned int rd_info;
- int res = 0;
-
- i2c_set_bus_num(adv7611_i2c[screen]);
-
- rd_info = (i2c_reg_read(IO_I2C_ADDR, IO_RD_INFO_MSB) << 8)
- | i2c_reg_read(IO_I2C_ADDR, IO_RD_INFO_LSB);
-
- if (rd_info != ADV7611_RDINFO) {
- res = -1;
- goto out;
- }
-
- /*
- * set I2C addresses to default values
- */
- i2c_reg_write(IO_I2C_ADDR, IO_CEC_ADDR, CEC_I2C_ADDR << 1);
- i2c_reg_write(IO_I2C_ADDR, IO_INFOFRAME_ADDR, INFOFRAME_I2C_ADDR << 1);
- i2c_reg_write(IO_I2C_ADDR, IO_DPLL_ADDR, DPLL_I2C_ADDR << 1);
- i2c_reg_write(IO_I2C_ADDR, IO_KSV_ADDR, KSV_I2C_ADDR << 1);
- i2c_reg_write(IO_I2C_ADDR, IO_EDID_ADDR, EDID_I2C_ADDR << 1);
- i2c_reg_write(IO_I2C_ADDR, IO_HDMI_ADDR, HDMI_I2C_ADDR << 1);
- i2c_reg_write(IO_I2C_ADDR, IO_CP_ADDR, CP_I2C_ADDR << 1);
-
- /*
- * do magic initialization sequence from
- * "ADV7611 Register Settings Recommendations Revision 1.5"
- * with most registers undocumented
- */
- i2c_reg_write(CP_I2C_ADDR, 0x6c, 0x00);
- i2c_reg_write(HDMI_I2C_ADDR, 0x9b, 0x03);
- i2c_reg_write(HDMI_I2C_ADDR, 0x6f, 0x08);
- i2c_reg_write(HDMI_I2C_ADDR, 0x85, 0x1f);
- i2c_reg_write(HDMI_I2C_ADDR, 0x87, 0x70);
- i2c_reg_write(HDMI_I2C_ADDR, 0x57, 0xda);
- i2c_reg_write(HDMI_I2C_ADDR, 0x58, 0x01);
- i2c_reg_write(HDMI_I2C_ADDR, 0x03, 0x98);
- i2c_reg_write(HDMI_I2C_ADDR, 0x4c, 0x44);
-
- /*
- * IO_REG_02, default 0xf0
- *
- * INP_COLOR_SPACE (IO, Address 0x02[7:4])
- * default: 0b1111 auto
- * set to : 0b0001 force RGB (range 0 to 255) input
- *
- * RGB_OUT (IO, Address 0x02[1])
- * default: 0 YPbPr color space output
- * set to : 1 RGB color space output
- */
- i2c_reg_write(IO_I2C_ADDR, 0x02, 0x12);
-
- /*
- * IO_REG_03, default 0x00
- *
- * OP_FORMAT_SEL (IO, Address 0x03[7:0])
- * default: 0x00 8-bit SDR ITU-656 mode
- * set to : 0x40 24-bit 4:4:4 SDR mode
- */
- i2c_reg_write(IO_I2C_ADDR, 0x03, 0x40);
-
- /*
- * IO_REG_05, default 0x2c
- *
- * AVCODE_INSERT_EN (IO, Address 0x05[2])
- * default: 1 insert AV codes into data stream
- * set to : 0 do not insert AV codes into data stream
- */
- i2c_reg_write(IO_I2C_ADDR, 0x05, 0x28);
-
- /*
- * IO_REG_0C, default 0x62
- *
- * POWER_DOWN (IO, Address 0x0C[5])
- * default: 1 chip is powered down
- * set to : 0 chip is operational
- */
- i2c_reg_write(IO_I2C_ADDR, 0x0c, 0x42);
-
- /*
- * IO_REG_15, default 0xbe
- *
- * TRI_SYNCS (IO, Address 0x15[3)
- * TRI_LLC (IO, Address 0x15[2])
- * TRI_PIX (IO, Address 0x15[1])
- * default: 1 video output pins are tristate
- * set to : 0 video output pins are active
- */
- i2c_reg_write(IO_I2C_ADDR, 0x15, 0xb0);
-
- /*
- * HDMI_REGISTER_02H, default 0xff
- *
- * CLOCK_TERMA_DISABLE (HDMI, Address 0x83[0])
- * default: 1 disable termination
- * set to : 0 enable termination
- * Future options are:
- * - use the chips automatic termination control
- * - set this manually on cable detect
- * but at the moment this seems a safe default.
- */
- i2c_reg_write(HDMI_I2C_ADDR, 0x83, 0xfe);
-
- /*
- * HDMI_CP_CNTRL_1, default 0x01
- *
- * HDMI_FRUN_EN (CP, Address 0xBA[0])
- * default: 1 Enable the free run feature in HDMI mode
- * set to : 0 Disable the free run feature in HDMI mode
- */
- i2c_reg_write(CP_I2C_ADDR, 0xba, 0x00);
-
- /*
- * INT1_CONFIGURATION, default 0x20
- *
- * INTRQ_DUR_SEL[1:0] (IO, Address 0x40[7:6])
- * default: 00 Interrupt signal is active for 4 Xtal periods
- * set to : 11 Active until cleared
- *
- * INTRQ_OP_SEL[1:0] (IO, Address 0x40[1:0])
- * default: 00 Open drain
- * set to : 10 Drives high when active
- */
- i2c_reg_write(IO_I2C_ADDR, 0x40, 0xc2);
-
-out:
- i2c_set_bus_num(old_bus);
-
- return res;
-}
-
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/adv7611.h b/board/gdsys/common/adv7611.h
deleted file mode 100644
index 7b4e27c6bc..0000000000
--- a/board/gdsys/common/adv7611.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifndef _ADV7611_H_
-#define _ADV7611_H_
-
-int adv7611_probe(unsigned int screen);
-
-#endif
diff --git a/board/gdsys/common/ch7301.c b/board/gdsys/common/ch7301.c
deleted file mode 100644
index 5e42467651..0000000000
--- a/board/gdsys/common/ch7301.c
+++ /dev/null
@@ -1,67 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-/* Chrontel CH7301C DVI Transmitter */
-
-#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-
-#include <common.h>
-#include <asm/io.h>
-#include <errno.h>
-#include <i2c.h>
-
-#define CH7301_I2C_ADDR 0x75
-
-enum {
- CH7301_CM = 0x1c, /* Clock Mode Register */
- CH7301_IC = 0x1d, /* Input Clock Register */
- CH7301_GPIO = 0x1e, /* GPIO Control Register */
- CH7301_IDF = 0x1f, /* Input Data Format Register */
- CH7301_CD = 0x20, /* Connection Detect Register */
- CH7301_DC = 0x21, /* DAC Control Register */
- CH7301_HPD = 0x23, /* Hot Plug Detection Register */
- CH7301_TCTL = 0x31, /* DVI Control Input Register */
- CH7301_TPCP = 0x33, /* DVI PLL Charge Pump Ctrl Register */
- CH7301_TPD = 0x34, /* DVI PLL Divide Register */
- CH7301_TPVT = 0x35, /* DVI PLL Supply Control Register */
- CH7301_TPF = 0x36, /* DVI PLL Filter Register */
- CH7301_TCT = 0x37, /* DVI Clock Test Register */
- CH7301_TSTP = 0x48, /* Test Pattern Register */
- CH7301_PM = 0x49, /* Power Management register */
- CH7301_VID = 0x4a, /* Version ID Register */
- CH7301_DID = 0x4b, /* Device ID Register */
- CH7301_DSP = 0x56, /* DVI Sync polarity Register */
-};
-
-int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C;
-
-int ch7301_probe(unsigned screen, bool power)
-{
- u8 value;
-
- i2c_set_bus_num(ch7301_i2c[screen]);
- if (i2c_probe(CH7301_I2C_ADDR))
- return -1;
-
- value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
- if (value != 0x17)
- return -1;
-
- if (power) {
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08);
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16);
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60);
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09);
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0);
- } else {
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x00);
- i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0x01);
- }
-
- return 0;
-}
-
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/ch7301.h b/board/gdsys/common/ch7301.h
deleted file mode 100644
index e0e8a9e9d4..0000000000
--- a/board/gdsys/common/ch7301.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifndef _CH7301_H_
-#define _CH7301_H_
-
-int ch7301_probe(unsigned screen, bool power);
-
-#endif
diff --git a/board/gdsys/common/fanctrl.c b/board/gdsys/common/fanctrl.c
deleted file mode 100644
index 27c875cbec..0000000000
--- a/board/gdsys/common/fanctrl.c
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2015
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-
-#include <common.h>
-#include <i2c.h>
-
-enum {
- FAN_CONFIG = 0x03,
- FAN_TACHLIM_LSB = 0x48,
- FAN_TACHLIM_MSB = 0x49,
- FAN_PWM_FREQ = 0x4D,
-};
-
-void init_fan_controller(u8 addr)
-{
- int val;
-
- /* set PWM Frequency to 2.5% resolution */
- i2c_reg_write(addr, FAN_PWM_FREQ, 20);
-
- /* set Tachometer Limit */
- i2c_reg_write(addr, FAN_TACHLIM_LSB, 0x10);
- i2c_reg_write(addr, FAN_TACHLIM_MSB, 0x0a);
-
- /* enable Tach input */
- val = i2c_reg_read(addr, FAN_CONFIG) | 0x04;
- i2c_reg_write(addr, FAN_CONFIG, val);
-}
-
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/fanctrl.h b/board/gdsys/common/fanctrl.h
deleted file mode 100644
index ab7e58def5..0000000000
--- a/board/gdsys/common/fanctrl.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2015
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifndef _FANCTRL_H_
-#define _FANCTRL_H_
-
-void init_fan_controller(u8 addr);
-
-#endif
diff --git a/board/gdsys/common/mclink.c b/board/gdsys/common/mclink.c
deleted file mode 100644
index 6147fbfc87..0000000000
--- a/board/gdsys/common/mclink.c
+++ /dev/null
@@ -1,141 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2012
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-
-#include <common.h>
-#include <asm/io.h>
-#include <errno.h>
-
-#include <gdsys_fpga.h>
-#include <linux/delay.h>
-
-enum {
- MCINT_SLAVE_LINK_CHANGED_EV = 1 << 7,
- MCINT_TX_ERROR_EV = 1 << 9,
- MCINT_TX_BUFFER_FREE = 1 << 10,
- MCINT_TX_PACKET_TRANSMITTED_EV = 1 << 11,
- MCINT_RX_ERROR_EV = 1 << 13,
- MCINT_RX_CONTENT_AVAILABLE = 1 << 14,
- MCINT_RX_PACKET_RECEIVED_EV = 1 << 15,
-};
-
-int mclink_probe(void)
-{
- unsigned int k;
- int slaves = 0;
-
- for (k = 0; k < CONFIG_SYS_MCLINK_MAX; ++k) {
- int timeout = 0;
- unsigned int ctr = 0;
- u16 mc_status;
-
- FPGA_GET_REG(k, mc_status, &mc_status);
-
- if (!(mc_status & (1 << 15)))
- break;
-
- FPGA_SET_REG(k, mc_control, 0x8000);
-
- FPGA_GET_REG(k, mc_status, &mc_status);
- while (!(mc_status & (1 << 14))) {
- udelay(100);
- if (ctr++ > 500) {
- timeout = 1;
- break;
- }
- FPGA_GET_REG(k, mc_status, &mc_status);
- }
- if (timeout)
- break;
-
- printf("waited %d us for mclink %d to come up\n", ctr * 100, k);
-
- slaves++;
- }
-
- return slaves;
-}
-
-int mclink_send(u8 slave, u16 addr, u16 data)
-{
- unsigned int ctr = 0;
- u16 int_status;
- u16 rx_cmd_status;
- u16 rx_cmd;
-
- /* reset interrupt status */
- FPGA_GET_REG(0, mc_int, &int_status);
- FPGA_SET_REG(0, mc_int, int_status);
-
- /* send */
- FPGA_SET_REG(0, mc_tx_address, addr);
- FPGA_SET_REG(0, mc_tx_data, data);
- FPGA_SET_REG(0, mc_tx_cmd, (slave & 0x03) << 14);
- FPGA_SET_REG(0, mc_control, 0x8001);
-
- /* wait for reply */
- FPGA_GET_REG(0, mc_int, &int_status);
- while (!(int_status & MCINT_RX_PACKET_RECEIVED_EV)) {
- udelay(100);
- if (ctr++ > 3)
- return -ETIMEDOUT;
- FPGA_GET_REG(0, mc_int, &int_status);
- }
-
- FPGA_GET_REG(0, mc_rx_cmd_status, &rx_cmd_status);
- rx_cmd = (rx_cmd_status >> 12) & 0x03;
- if (rx_cmd != 0)
- printf("mclink_send: received cmd %d, expected %d\n", rx_cmd,
- 0);
-
- return 0;
-}
-
-int mclink_receive(u8 slave, u16 addr, u16 *data)
-{
- u16 rx_cmd_status;
- u16 rx_cmd;
- u16 int_status;
- unsigned int ctr = 0;
-
- /* send read request */
- FPGA_SET_REG(0, mc_tx_address, addr);
- FPGA_SET_REG(0, mc_tx_cmd,
- ((slave & 0x03) << 14) | (1 << 12) | (1 << 0));
- FPGA_SET_REG(0, mc_control, 0x8001);
-
-
- /* wait for reply */
- FPGA_GET_REG(0, mc_int, &int_status);
- while (!(int_status & MCINT_RX_CONTENT_AVAILABLE)) {
- udelay(100);
- if (ctr++ > 3)
- return -ETIMEDOUT;
- FPGA_GET_REG(0, mc_int, &int_status);
- }
-
- /* check reply */
- FPGA_GET_REG(0, mc_rx_cmd_status, &rx_cmd_status);
- if ((rx_cmd_status >> 14) != slave) {
- printf("mclink_receive: reply from slave %d, expected %d\n",
- rx_cmd_status >> 14, slave);
- return -EINVAL;
- }
-
- rx_cmd = (rx_cmd_status >> 12) & 0x03;
- if (rx_cmd != 1) {
- printf("mclink_send: received cmd %d, expected %d\n",
- rx_cmd, 1);
- return -EIO;
- }
-
- FPGA_GET_REG(0, mc_rx_data, data);
-
- return 0;
-}
-
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/mclink.h b/board/gdsys/common/mclink.h
deleted file mode 100644
index 4dc4058892..0000000000
--- a/board/gdsys/common/mclink.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2012
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifndef _MCLINK_H_
-#define _MCLINK_H_
-
-int mclink_probe(void);
-int mclink_send(u8 slave, u16 addr, u16 data);
-int mclink_receive(u8 slave, u16 addr, u16 *data);
-
-#endif
diff --git a/board/gdsys/common/phy.c b/board/gdsys/common/phy.c
deleted file mode 100644
index 516f4e8edc..0000000000
--- a/board/gdsys/common/phy.c
+++ /dev/null
@@ -1,278 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#include <common.h>
-#include <log.h>
-
-#include <miiphy.h>
-
-enum {
- MIICMD_SET,
- MIICMD_MODIFY,
- MIICMD_VERIFY_VALUE,
- MIICMD_WAIT_FOR_VALUE,
-};
-
-struct mii_setupcmd {
- u8 token;
- u8 reg;
- u16 data;
- u16 mask;
- u32 timeout;
-};
-
-/*
- * verify we are talking to a 88e1518
- */
-struct mii_setupcmd verify_88e1518[] = {
- { MIICMD_SET, 22, 0x0000 },
- { MIICMD_VERIFY_VALUE, 2, 0x0141, 0xffff },
- { MIICMD_VERIFY_VALUE, 3, 0x0dd0, 0xfff0 },
-};
-
-/*
- * workaround for erratum mentioned in 88E1518 release notes
- */
-struct mii_setupcmd fixup_88e1518[] = {
- { MIICMD_SET, 22, 0x00ff },
- { MIICMD_SET, 17, 0x214b },
- { MIICMD_SET, 16, 0x2144 },
- { MIICMD_SET, 17, 0x0c28 },
- { MIICMD_SET, 16, 0x2146 },
- { MIICMD_SET, 17, 0xb233 },
- { MIICMD_SET, 16, 0x214d },
- { MIICMD_SET, 17, 0xcc0c },
- { MIICMD_SET, 16, 0x2159 },
- { MIICMD_SET, 22, 0x0000 },
-};
-
-/*
- * default initialization:
- * - set RGMII receive timing to "receive clock transition when data stable"
- * - set RGMII transmit timing to "transmit clock internally delayed"
- * - set RGMII output impedance target to 78,8 Ohm
- * - run output impedance calibration
- * - set autonegotiation advertise to 1000FD only
- */
-struct mii_setupcmd default_88e1518[] = {
- { MIICMD_SET, 22, 0x0002 },
- { MIICMD_MODIFY, 21, 0x0030, 0x0030 },
- { MIICMD_MODIFY, 25, 0x0000, 0x0003 },
- { MIICMD_MODIFY, 24, 0x8000, 0x8000 },
- { MIICMD_WAIT_FOR_VALUE, 24, 0x4000, 0x4000, 2000 },
- { MIICMD_SET, 22, 0x0000 },
- { MIICMD_MODIFY, 4, 0x0000, 0x01e0 },
- { MIICMD_MODIFY, 9, 0x0200, 0x0300 },
-};
-
-/*
- * turn off CLK125 for PHY daughterboard
- */
-struct mii_setupcmd ch1fix_88e1518[] = {
- { MIICMD_SET, 22, 0x0002 },
- { MIICMD_MODIFY, 16, 0x0006, 0x0006 },
- { MIICMD_SET, 22, 0x0000 },
-};
-
-/*
- * perform copper software reset
- */
-struct mii_setupcmd swreset_88e1518[] = {
- { MIICMD_SET, 22, 0x0000 },
- { MIICMD_MODIFY, 0, 0x8000, 0x8000 },
- { MIICMD_WAIT_FOR_VALUE, 0, 0x0000, 0x8000, 2000 },
-};
-
-/*
- * special one for 88E1514:
- * Force SGMII to Copper mode
- */
-struct mii_setupcmd mii_to_copper_88e1514[] = {
- { MIICMD_SET, 22, 0x0012 },
- { MIICMD_MODIFY, 20, 0x0001, 0x0007 },
- { MIICMD_MODIFY, 20, 0x8000, 0x8000 },
- { MIICMD_SET, 22, 0x0000 },
-};
-
-/*
- * turn off SGMII auto-negotiation
- */
-struct mii_setupcmd sgmii_autoneg_off_88e1518[] = {
- { MIICMD_SET, 22, 0x0001 },
- { MIICMD_MODIFY, 0, 0x0000, 0x1000 },
- { MIICMD_MODIFY, 0, 0x8000, 0x8000 },
- { MIICMD_SET, 22, 0x0000 },
-};
-
-/*
- * invert LED2 polarity
- */
-struct mii_setupcmd invert_led2_88e1514[] = {
- { MIICMD_SET, 22, 0x0003 },
- { MIICMD_MODIFY, 17, 0x0030, 0x0010 },
- { MIICMD_SET, 22, 0x0000 },
-};
-
-static int process_setupcmd(const char *bus, unsigned char addr,
- struct mii_setupcmd *setupcmd)
-{
- int res;
- u8 reg = setupcmd->reg;
- u16 data = setupcmd->data;
- u16 mask = setupcmd->mask;
- u32 timeout = setupcmd->timeout;
- u16 orig_data;
- unsigned long start;
-
- debug("mii %s:%u reg %2u ", bus, addr, reg);
-
- switch (setupcmd->token) {
- case MIICMD_MODIFY:
- res = miiphy_read(bus, addr, reg, &orig_data);
- if (res)
- break;
- debug("is %04x. (value %04x mask %04x) ", orig_data, data,
- mask);
- data = (orig_data & ~mask) | (data & mask);
- /* fallthrough */
- case MIICMD_SET:
- debug("=> %04x\n", data);
- res = miiphy_write(bus, addr, reg, data);
- break;
- case MIICMD_VERIFY_VALUE:
- res = miiphy_read(bus, addr, reg, &orig_data);
- if (res)
- break;
- if ((orig_data & mask) != (data & mask))
- res = -1;
- debug("(value %04x mask %04x) == %04x? %s\n", data, mask,
- orig_data, res ? "FAIL" : "PASS");
- break;
- case MIICMD_WAIT_FOR_VALUE:
- res = -1;
- start = get_timer(0);
- while ((res != 0) && (get_timer(start) < timeout)) {
- res = miiphy_read(bus, addr, reg, &orig_data);
- if (res)
- continue;
- if ((orig_data & mask) != (data & mask))
- res = -1;
- }
- debug("(value %04x mask %04x) == %04x? %s after %lu ms\n", data,
- mask, orig_data, res ? "FAIL" : "PASS",
- get_timer(start));
- break;
- default:
- res = -1;
- break;
- }
-
- return res;
-}
-
-static int process_setup(const char *bus, unsigned char addr,
- struct mii_setupcmd *setupcmd, unsigned int count)
-{
- int res = 0;
- unsigned int k;
-
- for (k = 0; k < count; ++k) {
- res = process_setupcmd(bus, addr, &setupcmd[k]);
- if (res) {
- printf("mii cmd %u on bus %s addr %u failed, aborting setup\n",
- setupcmd[k].token, bus, addr);
- break;
- }
- }
-
- return res;
-}
-
-int setup_88e1518(const char *bus, unsigned char addr)
-{
- int res;
-
- res = process_setup(bus, addr,
- verify_88e1518, ARRAY_SIZE(verify_88e1518));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- fixup_88e1518, ARRAY_SIZE(fixup_88e1518));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- default_88e1518, ARRAY_SIZE(default_88e1518));
- if (res)
- return res;
-
- if (addr) {
- res = process_setup(bus, addr,
- ch1fix_88e1518, ARRAY_SIZE(ch1fix_88e1518));
- if (res)
- return res;
- }
-
- res = process_setup(bus, addr,
- swreset_88e1518, ARRAY_SIZE(swreset_88e1518));
- if (res)
- return res;
-
- return 0;
-}
-
-int setup_88e1514(const char *bus, unsigned char addr)
-{
- int res;
-
- res = process_setup(bus, addr,
- verify_88e1518, ARRAY_SIZE(verify_88e1518));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- fixup_88e1518, ARRAY_SIZE(fixup_88e1518));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- mii_to_copper_88e1514,
- ARRAY_SIZE(mii_to_copper_88e1514));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- sgmii_autoneg_off_88e1518,
- ARRAY_SIZE(sgmii_autoneg_off_88e1518));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- invert_led2_88e1514,
- ARRAY_SIZE(invert_led2_88e1514));
- if (res)
- return res;
-
- res = process_setup(bus, addr,
- default_88e1518, ARRAY_SIZE(default_88e1518));
- if (res)
- return res;
-
- if (addr) {
- res = process_setup(bus, addr,
- ch1fix_88e1518, ARRAY_SIZE(ch1fix_88e1518));
- if (res)
- return res;
- }
-
- res = process_setup(bus, addr,
- swreset_88e1518, ARRAY_SIZE(swreset_88e1518));
- if (res)
- return res;
-
- return 0;
-}
diff --git a/board/gdsys/common/phy.h b/board/gdsys/common/phy.h
deleted file mode 100644
index e0aa661b9c..0000000000
--- a/board/gdsys/common/phy.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2014
- * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
- */
-
-#ifndef _PHY_H_
-#define _PHY_H_
-
-int setup_88e1514(const char *bus, unsigned char addr);
-int setup_88e1518(const char *bus, unsigned char addr);
-
-#endif
generated by cgit (git 2.34.1) at 2024-06-20 02:56:57 +0000