diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx')
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Kconfig | 36 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/Makefile | 2 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/speed.c | 4 | ||||
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 4 |
4 files changed, 3 insertions, 43 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 124c22f58a..f7679f7ea1 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -210,14 +210,6 @@ config TARGET_T2080RDB imply CMD_SATA imply PANIC_HANG -config TARGET_T2081QDS - bool "Support T2081QDS" - select ARCH_T2081 - select SUPPORT_SPL - select PHYS_64BIT - select FSL_DDR_FIRST_SLOT_QUAD_CAPABLE - select FSL_DDR_INTERACTIVE - config TARGET_T4160RDB bool "Support T4160RDB" select ARCH_T4160 @@ -928,29 +920,6 @@ config ARCH_T2080 imply CMD_REGINFO imply FSL_SATA -config ARCH_T2081 - bool - select E500MC - select E6500 - select FSL_LAW - select SYS_FSL_DDR_VER_47 - select SYS_FSL_ERRATUM_A006379 - select SYS_FSL_ERRATUM_A006593 - select SYS_FSL_ERRATUM_A007186 - select SYS_FSL_ERRATUM_A007212 - select SYS_FSL_ERRATUM_A009942 - select SYS_FSL_ERRATUM_ESDHC111 - select FSL_PCIE_RESET - select SYS_FSL_HAS_DDR3 - select SYS_FSL_HAS_SEC - select SYS_FSL_QORIQ_CHASSIS2 - select SYS_FSL_SEC_BE - select SYS_FSL_SEC_COMPAT_4 - select SYS_PPC64 - select FSL_IFC - imply CMD_NAND - imply CMD_REGINFO - config ARCH_T4160 bool select E500MC @@ -1052,8 +1021,7 @@ config MAX_CPUS ARCH_P5040 || \ ARCH_T1040 || \ ARCH_T1042 || \ - ARCH_T2080 || \ - ARCH_T2081 + ARCH_T2080 default 2 if ARCH_B4420 || \ ARCH_BSC9132 || \ ARCH_MPC8572 || \ @@ -1110,7 +1078,6 @@ config SYS_CCSRBAR_DEFAULT ARCH_T1040 || \ ARCH_T1042 || \ ARCH_T2080 || \ - ARCH_T2081 || \ ARCH_T4160 || \ ARCH_T4240 default 0xe0000000 if ARCH_QEMU_E500 @@ -1297,7 +1264,6 @@ config SYS_FSL_NUM_LAWS ARCH_P5020 || \ ARCH_P5040 || \ ARCH_T2080 || \ - ARCH_T2081 || \ ARCH_T4160 || \ ARCH_T4240 default 16 if ARCH_T1023 || \ diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 14e46626f3..30dd1b4c2c 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -51,7 +51,6 @@ obj-$(CONFIG_ARCH_T1042) += t1040_ids.o obj-$(CONFIG_ARCH_T1023) += t1024_ids.o obj-$(CONFIG_ARCH_T1024) += t1024_ids.o obj-$(CONFIG_ARCH_T2080) += t2080_ids.o -obj-$(CONFIG_ARCH_T2081) += t2080_ids.o obj-$(CONFIG_QE) += qe_io.o @@ -90,7 +89,6 @@ obj-$(CONFIG_ARCH_T1042) += t1040_serdes.o obj-$(CONFIG_ARCH_T1023) += t1024_serdes.o obj-$(CONFIG_ARCH_T1024) += t1024_serdes.o obj-$(CONFIG_ARCH_T2080) += t2080_serdes.o -obj-$(CONFIG_ARCH_T2081) += t2080_serdes.o obj-y += cpu.o obj-y += cpu_init.o diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 9c89ce5d70..59a007b491 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -127,7 +127,7 @@ void get_sys_info(sys_info_t *sys_info) * T2080 rev 1.1 and later also use half mem_pll comparing with rev 1.0 */ #if defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160) || \ - defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081) + defined(CONFIG_ARCH_T2080) svr = get_svr(); switch (SVR_SOC_VER(svr)) { case SVR_T4240: @@ -198,7 +198,7 @@ void get_sys_info(sys_info_t *sys_info) #endif #if defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420) || \ - defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081) + defined(CONFIG_ARCH_T2080) #define FM1_CLK_SEL 0xe0000000 #define FM1_CLK_SHIFT 29 #elif defined(CONFIG_ARCH_T1024) || defined(CONFIG_ARCH_T1023) diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 32cfcc0242..5f34aab453 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -160,7 +160,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {} }; -#ifndef CONFIG_ARCH_T2081 static const struct serdes_config serdes2_cfg_tbl[] = { /* SerDes 2 */ {0x1F, {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2} }, @@ -176,13 +175,10 @@ static const struct serdes_config serdes2_cfg_tbl[] = { {0x36, {SRIO2, SRIO2, SRIO2, SRIO2, AURORA, AURORA, SATA1, SATA2} }, {} }; -#endif static const struct serdes_config *serdes_cfg_tbl[] = { serdes1_cfg_tbl, -#ifndef CONFIG_ARCH_T2081 serdes2_cfg_tbl, -#endif }; enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) |