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Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c')
-rw-r--r--arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
index ed78a66f5d..b27763ed7b 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
@@ -34,11 +34,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = {
int is_serdes_configured(enum srds_prtcl device)
{
- int ret = (1 << device) & serdes1_prtcl_map;
+ int ret;
+
+ if (!(serdes1_prtcl_map & (1 << NONE)))
+ fsl_serdes_init();
+
+ ret = (1 << device) & serdes1_prtcl_map;
if (ret)
return ret;
+ if (!(serdes2_prtcl_map & (1 << NONE)))
+ fsl_serdes_init();
+
return (1 << device) & serdes2_prtcl_map;
}
@@ -50,6 +58,10 @@ void fsl_serdes_init(void)
MPC85xx_PORDEVSR_IO_SEL_SHIFT;
int lane;
+ if (serdes1_prtcl_map & (1 << NONE) &&
+ serdes2_prtcl_map & (1 << NONE))
+ return;
+
debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg);
if (srds_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
@@ -61,6 +73,9 @@ void fsl_serdes_init(void)
serdes1_prtcl_map |= (1 << lane_prtcl);
}
+ /* Set the first bit to indicate serdes has been initialized */
+ serdes1_prtcl_map |= (1 << NONE);
+
if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) {
printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg);
return;
@@ -76,4 +91,7 @@ void fsl_serdes_init(void)
if (pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)
serdes2_prtcl_map &= ~(1 << SGMII_TSEC3);
+
+ /* Set the first bit to indicate serdes has been initialized */
+ serdes2_prtcl_map |= (1 << NONE);
}