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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/dts/Makefile1
-rw-r--r--arch/arm/dts/fsl-imx8qm.dtsi15
-rw-r--r--arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi8
-rw-r--r--arch/arm/dts/imx6qdl-sabreauto.dtsi2
-rw-r--r--arch/arm/dts/imx6qdl-sabresd.dtsi2
-rw-r--r--arch/arm/dts/imx6qdl-sr-som.dtsi11
-rw-r--r--arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi2
-rw-r--r--arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi2
-rw-r--r--arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi3
-rw-r--r--arch/arm/dts/tegra186.dtsi5
-rw-r--r--arch/arm/dts/tegra210.dtsi5
-rw-r--r--arch/arm/dts/zynqmp-e-a2197-00-revA.dts10
-rw-r--r--arch/arm/dts/zynqmp-mini-qspi.dts2
-rw-r--r--arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts117
-rw-r--r--arch/arm/include/asm/arch-mx7/mx7-ddr.h4
-rw-r--r--arch/arm/mach-imx/mx7/Kconfig7
-rw-r--r--arch/arm/mach-imx/mx7/ddr.c1
18 files changed, 182 insertions, 17 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index edc9e38c6c..54d65f8488 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -873,11 +873,11 @@ config ARCH_MX7ULP
config ARCH_MX7
bool "Freescale MX7"
select ARCH_MISC_INIT
- select BOARD_EARLY_INIT_F
select CPU_V7A
select SYS_FSL_HAS_SEC if IMX_HAB
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
+ imply BOARD_EARLY_INIT_F
imply MXC_GPIO
imply SYS_THUMB_BUILD
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 03b1f8388d..89fa448818 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -280,6 +280,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-mini-emmc1.dtb \
zynqmp-mini-nand.dtb \
zynqmp-mini-qspi.dtb \
+ zynqmp-topic-miamimp-xilinx-xdp-v1r1.dtb \
zynqmp-zcu100-revC.dtb \
zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \
diff --git a/arch/arm/dts/fsl-imx8qm.dtsi b/arch/arm/dts/fsl-imx8qm.dtsi
index 2e887add79..88aeaf65b3 100644
--- a/arch/arm/dts/fsl-imx8qm.dtsi
+++ b/arch/arm/dts/fsl-imx8qm.dtsi
@@ -21,13 +21,14 @@
aliases {
ethernet0 = &fec1;
ethernet1 = &fec2;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
- gpio3 = &gpio4;
- gpio4 = &gpio5;
- gpio5 = &gpio6;
- gpio6 = &gpio7;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ gpio2 = &gpio2;
+ gpio3 = &gpio3;
+ gpio4 = &gpio4;
+ gpio5 = &gpio5;
+ gpio6 = &gpio6;
+ gpio7 = &gpio7;
serial0 = &lpuart0;
serial1 = &lpuart1;
serial2 = &lpuart2;
diff --git a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
index d302b2e275..400b885e43 100644
--- a/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-hummingboard2-emmc-som-v15-u-boot.dtsi
@@ -34,3 +34,11 @@
&usdhc1 {
status = "disabled";
};
+
+&usdhc2 {
+ u-boot,dm-pre-reloc;
+};
+
+&usdhc3 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/imx6qdl-sabreauto.dtsi b/arch/arm/dts/imx6qdl-sabreauto.dtsi
index a6dc5c42c6..28a7fdb0f1 100644
--- a/arch/arm/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/dts/imx6qdl-sabreauto.dtsi
@@ -281,7 +281,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
diff --git a/arch/arm/dts/imx6qdl-sabresd.dtsi b/arch/arm/dts/imx6qdl-sabresd.dtsi
index 2cd5a9fbac..eddb390174 100644
--- a/arch/arm/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/dts/imx6qdl-sabresd.dtsi
@@ -204,7 +204,7 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
status = "okay";
};
diff --git a/arch/arm/dts/imx6qdl-sr-som.dtsi b/arch/arm/dts/imx6qdl-sr-som.dtsi
index 6d7f6b9035..b06577808f 100644
--- a/arch/arm/dts/imx6qdl-sr-som.dtsi
+++ b/arch/arm/dts/imx6qdl-sr-som.dtsi
@@ -53,10 +53,21 @@
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
+ phy-handle = <&phy>;
phy-mode = "rgmii-id";
phy-reset-duration = <2>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@0 {
+ reg = <0>;
+ qca,clk-out-frequency = <125000000>;
+ };
+ };
};
&iomuxc {
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index 3fedb6f1e1..e13dade463 100644
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -171,6 +171,8 @@
&sdmmc1 {
u-boot,dm-spl;
+ broken-cd;
+ /delete-property/ cd-gpios;
};
&sdmmc1_b4_pins_a {
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index a07c585415..b16dc28d47 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -167,6 +167,8 @@
&sdmmc1 {
u-boot,dm-spl;
+ broken-cd;
+ /delete-property/ cd-gpios;
};
&sdmmc1_b4_pins_a {
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 75d75266e8..df63ad4a24 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -273,6 +273,9 @@
&sdmmc1 {
u-boot,dm-spl;
+ broken-cd;
+ /delete-property/ cd-gpios;
+ /delete-property/ disable-wp;
};
&sdmmc1_b4_pins_a {
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index 0a9db9825b..edcb7aacb8 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -335,4 +335,9 @@
status = "disabled";
};
};
+
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
};
diff --git a/arch/arm/dts/tegra210.dtsi b/arch/arm/dts/tegra210.dtsi
index 3ec54b11c4..a521a43d6c 100644
--- a/arch/arm/dts/tegra210.dtsi
+++ b/arch/arm/dts/tegra210.dtsi
@@ -867,6 +867,11 @@
};
};
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index bf982e2218..c260411d75 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx Versal a2197 RevA System Controller
*
- * (C) Copyright 2019, Xilinx, Inc.
+ * (C) Copyright 2019 - 2020, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@ -421,14 +421,14 @@
temperature-stability = <50>;
factory-fout = <156250000>;
clock-frequency = <156250000>;
- clock-output-names = "si570_hsdp_clk";
+ clock-output-names = "si570_zsfp_clk";
};
};
i2c@6 { /* USER_SI570_1 */
#address-cells = <1>;
#size-cells = <0>;
reg = <6>;
- si570_user1_clk: clock-generator@5d { /* u205 */
+ si570_user1: clock-generator@5d { /* u205 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x5f>;
@@ -510,7 +510,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
- si570_ddr_dimm2: clock-generator@60 { /* u3 */
+ si570_lpddr4clk2: clock-generator@60 { /* u3 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x60>;
@@ -524,7 +524,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
- si570_lpddr4: clock-generator@60 { /* u4 */
+ si570_lpddr4clk1: clock-generator@60 { /* u4 */
#clock-cells = <0>;
compatible = "silabs,si570";
reg = <0x60>;
diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts
index c523e81236..a76e640466 100644
--- a/arch/arm/dts/zynqmp-mini-qspi.dts
+++ b/arch/arm/dts/zynqmp-mini-qspi.dts
@@ -70,7 +70,7 @@
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
- spi-max-frequency = <10000000>;
+ spi-max-frequency = <108000000>;
};
};
diff --git a/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
new file mode 100644
index 0000000000..0ee8c62f6b
--- /dev/null
+++ b/arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * dts file for Topic XDP (Xilinx Drone Platform)
+ *
+ * (C) Copyright 2016, Topic Embedded Products BV
+ * Mike Looijmans <mike.looijmans@topic.nl>
+ */
+
+/dts-v1/;
+
+#include "zynqmp.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy.h>
+
+/ {
+ model = "Topic Miamimp ZynqMP XDP v1r1";
+ compatible = "topic,miamimp-xdp-v1r1", "topic,miamimp-xdp",
+ "topic,miamimp", "xlnx,zynqmp";
+
+ aliases {
+ gpio0 = &gpio;
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ mmc0 = &sdhci0;
+ mmc1 = &sdhci1;
+ rtc0 = &rtc;
+ serial0 = &uart1;
+ serial1 = &uart0;
+ serial2 = &dcc;
+ spi0 = &qspi;
+ usb0 = &usb0;
+ };
+
+ chosen {
+ bootargs = "earlycon";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
+ };
+};
+
+&dcc {
+ status = "okay";
+};
+
+&gpio {
+ status = "okay";
+};
+
+&gpu {
+ status = "okay";
+};
+
+&qspi {
+ status = "okay";
+ is-dual = <1>;
+ flash@0 {
+ compatible = "st,m25p80", "n25q256a";
+ m25p,fast-read;
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <166000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ is-dual = <1>;
+ partition@0 {
+ label = "qspi-boot-bin";
+ reg = <0x00000 0x60000>;
+ };
+ partition@60000 {
+ label = "qspi-u-boot-itb";
+ reg = <0x60000 0x100000>;
+ };
+ partition@160000 {
+ label = "qspi-u-boot-env";
+ reg = <0x160000 0x20000>;
+ };
+ partition@200000 {
+ label = "qspi-rootfs";
+ reg = <0x200000 0x1e00000>;
+ };
+ };
+};
+
+&rtc {
+ status = "okay";
+};
+
+/* eMMC device */
+&sdhci0 {
+ status = "okay";
+ non-removable;
+ disable-wp; /* We don't have a write-protect detection */
+ bus-width = <8>;
+ xlnx,mio_bank = <0>;
+};
+
+/* SD1 with level shifter */
+&sdhci1 {
+ status = "okay";
+ xlnx,mio_bank = <1>;
+ disable-wp; /* We don't have a write-protect detection */
+ bus-width = <4>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
diff --git a/arch/arm/include/asm/arch-mx7/mx7-ddr.h b/arch/arm/include/asm/arch-mx7/mx7-ddr.h
index 37aaee0ad7..bea5dd8ec5 100644
--- a/arch/arm/include/asm/arch-mx7/mx7-ddr.h
+++ b/arch/arm/include/asm/arch-mx7/mx7-ddr.h
@@ -39,7 +39,9 @@ struct ddrc {
u32 dramtmg8; /* 0x0120 */
u32 reserved7[0x17];
u32 zqctl0; /* 0x0180 */
- u32 reserved8[0x03];
+ u32 zqctl1; /* 0x0184 */
+ u32 zqctl2; /* 0x0188 */
+ u32 zqstat; /* 0x018c */
u32 dfitmg0; /* 0x0190 */
u32 dfitmg1; /* 0x0194 */
u32 reserved9[0x02];
diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig
index 286d36589d..c8146c3509 100644
--- a/arch/arm/mach-imx/mx7/Kconfig
+++ b/arch/arm/mach-imx/mx7/Kconfig
@@ -16,6 +16,13 @@ config MX7D
select ROM_UNIFIED_SECTIONS
imply CMD_FUSE
+config SYS_TEXT_BASE
+ default 0x87800000
+
+config SPL_TEXT_BASE
+ depends on SPL
+ default 0x00912000
+
choice
prompt "MX7 board select"
optional
diff --git a/arch/arm/mach-imx/mx7/ddr.c b/arch/arm/mach-imx/mx7/ddr.c
index d1e10a6788..45954ed1ed 100644
--- a/arch/arm/mach-imx/mx7/ddr.c
+++ b/arch/arm/mach-imx/mx7/ddr.c
@@ -74,6 +74,7 @@ void mx7_dram_cfg(struct ddrc *ddrc_regs_val, struct ddrc_mp *ddrc_mp_val,
writel(ddrc_regs_val->dramtmg5, &ddrc_regs->dramtmg5);
writel(ddrc_regs_val->dramtmg8, &ddrc_regs->dramtmg8);
writel(ddrc_regs_val->zqctl0, &ddrc_regs->zqctl0);
+ writel(ddrc_regs_val->zqctl1, &ddrc_regs->zqctl1);
writel(ddrc_regs_val->dfitmg0, &ddrc_regs->dfitmg0);
writel(ddrc_regs_val->dfitmg1, &ddrc_regs->dfitmg1);
writel(ddrc_regs_val->dfiupd0, &ddrc_regs->dfiupd0);
generated by cgit (git 2.34.1) at 2024-12-28 04:15:22 +0000