diff options
Diffstat (limited to 'arch/arm/mach-snapdragon/pinctrl-snapdragon.c')
| -rw-r--r-- | arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index 5365ccdb70..9ba8fdd729 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -22,7 +22,7 @@ struct msm_pinctrl_priv { #define TLMM_GPIO_PULL_MASK GENMASK(1, 0) #define TLMM_FUNC_SEL_MASK GENMASK(5, 2) #define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6) -#define TLMM_GPIO_ENABLE BIT(9) +#define TLMM_GPIO_DISABLE BIT(9) static const struct pinconf_param msm_conf_params[] = { { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 }, @@ -74,7 +74,7 @@ static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector, struct msm_pinctrl_priv *priv = dev_get_priv(dev); clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector), - TLMM_FUNC_SEL_MASK | TLMM_GPIO_ENABLE, + TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE, priv->data->get_function_mux(func_selector) << 2); return 0; } @@ -113,8 +113,8 @@ static struct pinctrl_ops msm_pinctrl_ops = { }; static const struct udevice_id msm_pinctrl_ids[] = { - { .compatible = "qcom,tlmm-msm8916", .data = (ulong)&apq8016_data }, { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data }, + { .compatible = "qcom,tlmm-apq8096", .data = (ulong)&apq8096_data }, { } }; |