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-rw-r--r--arch/powerpc/cpu/mpc83xx/Kconfig1
-rw-r--r--arch/powerpc/cpu/mpc83xx/bats/Kconfig1311
-rw-r--r--arch/powerpc/cpu/mpc83xx/bats/bats.h223
-rw-r--r--arch/powerpc/cpu/mpc83xx/start.S1
-rw-r--r--configs/MPC8308RDB_defconfig36
-rw-r--r--configs/MPC8313ERDB_33_defconfig45
-rw-r--r--configs/MPC8313ERDB_66_defconfig45
-rw-r--r--configs/MPC8313ERDB_NAND_33_defconfig45
-rw-r--r--configs/MPC8313ERDB_NAND_66_defconfig45
-rw-r--r--configs/MPC8315ERDB_defconfig56
-rw-r--r--configs/MPC8323ERDB_defconfig56
-rw-r--r--configs/MPC832XEMDS_ATM_defconfig46
-rw-r--r--configs/MPC832XEMDS_HOST_33_defconfig66
-rw-r--r--configs/MPC832XEMDS_HOST_66_defconfig66
-rw-r--r--configs/MPC832XEMDS_SLAVE_defconfig66
-rw-r--r--configs/MPC832XEMDS_defconfig46
-rw-r--r--configs/MPC8349EMDS_PCI64_defconfig31
-rw-r--r--configs/MPC8349EMDS_SDRAM_defconfig31
-rw-r--r--configs/MPC8349EMDS_SLAVE_defconfig31
-rw-r--r--configs/MPC8349EMDS_defconfig31
-rw-r--r--configs/MPC8349ITXGP_defconfig71
-rw-r--r--configs/MPC8349ITX_LOWBOOT_defconfig71
-rw-r--r--configs/MPC8349ITX_defconfig71
-rw-r--r--configs/MPC837XEMDS_HOST_defconfig75
-rw-r--r--configs/MPC837XEMDS_SLAVE_defconfig39
-rw-r--r--configs/MPC837XEMDS_defconfig55
-rw-r--r--configs/MPC837XERDB_SLAVE_defconfig39
-rw-r--r--configs/MPC837XERDB_defconfig75
-rw-r--r--configs/TQM834x_defconfig79
-rw-r--r--configs/caddy2_defconfig49
-rw-r--r--configs/hrcon_defconfig36
-rw-r--r--configs/hrcon_dh_defconfig36
-rw-r--r--configs/ids8313_defconfig46
-rw-r--r--configs/kmcoge5ne_defconfig79
-rw-r--r--configs/kmeter1_defconfig53
-rw-r--r--configs/kmopti2_defconfig68
-rw-r--r--configs/kmsupx5_defconfig58
-rw-r--r--configs/kmtegr1_defconfig58
-rw-r--r--configs/kmtepr2_defconfig68
-rw-r--r--configs/kmvect1_defconfig68
-rw-r--r--configs/mpc8308_p1m_defconfig36
-rw-r--r--configs/sbc8349_PCI_33_defconfig51
-rw-r--r--configs/sbc8349_PCI_66_defconfig51
-rw-r--r--configs/sbc8349_defconfig31
-rw-r--r--configs/strider_con_defconfig36
-rw-r--r--configs/strider_con_dp_defconfig36
-rw-r--r--configs/strider_cpu_defconfig36
-rw-r--r--configs/strider_cpu_dp_defconfig36
-rw-r--r--configs/suvd3_defconfig68
-rw-r--r--configs/tuge1_defconfig58
-rw-r--r--configs/tuxx1_defconfig68
-rw-r--r--configs/ve8313_defconfig54
-rw-r--r--configs/vme8349_defconfig49
-rw-r--r--include/configs/MPC8308RDB.h37
-rw-r--r--include/configs/MPC8313ERDB_NAND.h62
-rw-r--r--include/configs/MPC8313ERDB_NOR.h62
-rw-r--r--include/configs/MPC8315ERDB.h79
-rw-r--r--include/configs/MPC8323ERDB.h94
-rw-r--r--include/configs/MPC832XEMDS.h100
-rw-r--r--include/configs/MPC8349EMDS.h93
-rw-r--r--include/configs/MPC8349EMDS_SDRAM.h93
-rw-r--r--include/configs/MPC8349ITX.h96
-rw-r--r--include/configs/MPC837XEMDS.h108
-rw-r--r--include/configs/MPC837XERDB.h108
-rw-r--r--include/configs/TQM834x.h92
-rw-r--r--include/configs/caddy2.h72
-rw-r--r--include/configs/hrcon.h37
-rw-r--r--include/configs/ids8313.h77
-rw-r--r--include/configs/kmcoge5ne.h104
-rw-r--r--include/configs/kmeter1.h77
-rw-r--r--include/configs/kmopti2.h89
-rw-r--r--include/configs/kmsupx5.h81
-rw-r--r--include/configs/kmtegr1.h68
-rw-r--r--include/configs/kmtepr2.h90
-rw-r--r--include/configs/kmvect1.h72
-rw-r--r--include/configs/mpc8308_p1m.h37
-rw-r--r--include/configs/sbc8349.h93
-rw-r--r--include/configs/strider.h37
-rw-r--r--include/configs/suvd3.h72
-rw-r--r--include/configs/tuge1.h81
-rw-r--r--include/configs/tuxx1.h90
-rw-r--r--include/configs/ve8313.h70
-rw-r--r--include/configs/vme8349.h72
83 files changed, 4082 insertions, 2343 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 1206c687cc..f7f625aea1 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -283,6 +283,7 @@ config ARCH_MPC837X
select MPC83XX_SECOND_I2C_SUPPORT
source "arch/powerpc/cpu/mpc83xx/hrcw/Kconfig"
+source "arch/powerpc/cpu/mpc83xx/bats/Kconfig"
menu "Legacy options"
diff --git a/arch/powerpc/cpu/mpc83xx/bats/Kconfig b/arch/powerpc/cpu/mpc83xx/bats/Kconfig
new file mode 100644
index 0000000000..218920cfc9
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/bats/Kconfig
@@ -0,0 +1,1311 @@
+menu "BATS setup"
+
+menuconfig BAT0
+ bool "BAT0"
+
+if BAT0
+
+config BAT0_NAME
+ string "Identifier"
+
+config BAT0_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT0_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT0_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT0_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT0_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT0_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT0_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT0_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT0_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT0_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT0_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT0_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT0_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT0_ACCESS_NONE
+ bool "No access"
+
+config BAT0_ACCESS_RO
+ bool "Read-only"
+
+config BAT0_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT0_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT0_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT0_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT0_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT0_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT0_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT0_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT0_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT0_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT0_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT0_LENGTH
+ hex
+ default 0x00000000 if BAT0_LENGTH_128_KBYTES
+ default 0x00000004 if BAT0_LENGTH_256_KBYTES
+ default 0x0000000c if BAT0_LENGTH_512_KBYTES
+ default 0x0000001c if BAT0_LENGTH_1_MBYTES
+ default 0x0000003c if BAT0_LENGTH_2_MBYTES
+ default 0x0000007c if BAT0_LENGTH_4_MBYTES
+ default 0x000000fc if BAT0_LENGTH_8_MBYTES
+ default 0x000001fc if BAT0_LENGTH_16_MBYTES
+ default 0x000003fc if BAT0_LENGTH_32_MBYTES
+ default 0x000007fc if BAT0_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT0_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT0_LENGTH_256_MBYTES
+
+config BAT0_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT0_ACCESS_NONE
+ default 0x1 if BAT0_ACCESS_RO
+ default 0x2 if BAT0_ACCESS_RW
+
+config BAT0_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x8 if !BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x10 if !BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x18 if !BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x20 if !BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x28 if !BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x30 if !BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x38 if !BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x40 if BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x48 if BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x50 if BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x58 if BAT0_ICACHE_WRITETHROUGH && !BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x60 if BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x68 if BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && !BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+ default 0x70 if BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && !BAT0_ICACHE_GUARDED
+ default 0x78 if BAT0_ICACHE_WRITETHROUGH && BAT0_ICACHE_INHIBITED && BAT0_ICACHE_MEMORYCOHERENCE && BAT0_ICACHE_GUARDED
+
+config BAT0_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x8 if !BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x10 if !BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x18 if !BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x20 if !BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x28 if !BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x30 if !BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x38 if !BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x40 if BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x48 if BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x50 if BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x58 if BAT0_DCACHE_WRITETHROUGH && !BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x60 if BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x68 if BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && !BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+ default 0x70 if BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && !BAT0_DCACHE_GUARDED
+ default 0x78 if BAT0_DCACHE_WRITETHROUGH && BAT0_DCACHE_INHIBITED && BAT0_DCACHE_MEMORYCOHERENCE && BAT0_DCACHE_GUARDED
+
+config BAT0_VALID_BITS
+ hex
+ default 0x0 if !BAT0_SUPERVISOR_MODE_VALID && !BAT0_USER_MODE_VALID
+ default 0x1 if !BAT0_SUPERVISOR_MODE_VALID && BAT0_USER_MODE_VALID
+ default 0x2 if BAT0_SUPERVISOR_MODE_VALID && !BAT0_USER_MODE_VALID
+ default 0x3 if BAT0_SUPERVISOR_MODE_VALID && BAT0_USER_MODE_VALID
+
+menuconfig BAT1
+ bool "BAT1"
+
+if BAT1
+
+config BAT1_NAME
+ string "Identifier"
+
+config BAT1_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT1_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT1_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT1_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT1_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT1_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT1_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT1_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT1_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT1_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT1_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT1_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT1_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT1_ACCESS_NONE
+ bool "No access"
+
+config BAT1_ACCESS_RO
+ bool "Read-only"
+
+config BAT1_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT1_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT1_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT1_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT1_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT1_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT1_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT1_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT1_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT1_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT1_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT1_LENGTH
+ hex
+ default 0x00000000 if BAT1_LENGTH_128_KBYTES
+ default 0x00000004 if BAT1_LENGTH_256_KBYTES
+ default 0x0000000c if BAT1_LENGTH_512_KBYTES
+ default 0x0000001c if BAT1_LENGTH_1_MBYTES
+ default 0x0000003c if BAT1_LENGTH_2_MBYTES
+ default 0x0000007c if BAT1_LENGTH_4_MBYTES
+ default 0x000000fc if BAT1_LENGTH_8_MBYTES
+ default 0x000001fc if BAT1_LENGTH_16_MBYTES
+ default 0x000003fc if BAT1_LENGTH_32_MBYTES
+ default 0x000007fc if BAT1_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT1_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT1_LENGTH_256_MBYTES
+
+config BAT1_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT1_ACCESS_NONE
+ default 0x1 if BAT1_ACCESS_RO
+ default 0x2 if BAT1_ACCESS_RW
+
+config BAT1_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x8 if !BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x10 if !BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x18 if !BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x20 if !BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x28 if !BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x30 if !BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x38 if !BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x40 if BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x48 if BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x50 if BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x58 if BAT1_ICACHE_WRITETHROUGH && !BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x60 if BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x68 if BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && !BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+ default 0x70 if BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && !BAT1_ICACHE_GUARDED
+ default 0x78 if BAT1_ICACHE_WRITETHROUGH && BAT1_ICACHE_INHIBITED && BAT1_ICACHE_MEMORYCOHERENCE && BAT1_ICACHE_GUARDED
+
+config BAT1_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x8 if !BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x10 if !BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x18 if !BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x20 if !BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x28 if !BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x30 if !BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x38 if !BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x40 if BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x48 if BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x50 if BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x58 if BAT1_DCACHE_WRITETHROUGH && !BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x60 if BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x68 if BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && !BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+ default 0x70 if BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && !BAT1_DCACHE_GUARDED
+ default 0x78 if BAT1_DCACHE_WRITETHROUGH && BAT1_DCACHE_INHIBITED && BAT1_DCACHE_MEMORYCOHERENCE && BAT1_DCACHE_GUARDED
+
+config BAT1_VALID_BITS
+ hex
+ default 0x0 if !BAT1_SUPERVISOR_MODE_VALID && !BAT1_USER_MODE_VALID
+ default 0x1 if !BAT1_SUPERVISOR_MODE_VALID && BAT1_USER_MODE_VALID
+ default 0x2 if BAT1_SUPERVISOR_MODE_VALID && !BAT1_USER_MODE_VALID
+ default 0x3 if BAT1_SUPERVISOR_MODE_VALID && BAT1_USER_MODE_VALID
+
+menuconfig BAT2
+ bool "BAT2"
+
+if BAT2
+
+config BAT2_NAME
+ string "Identifier"
+
+config BAT2_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT2_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT2_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT2_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT2_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT2_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT2_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT2_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT2_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT2_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT2_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT2_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT2_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT2_ACCESS_NONE
+ bool "No access"
+
+config BAT2_ACCESS_RO
+ bool "Read-only"
+
+config BAT2_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT2_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT2_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT2_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT2_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT2_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT2_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT2_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT2_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT2_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT2_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT2_LENGTH
+ hex
+ default 0x00000000 if BAT2_LENGTH_128_KBYTES
+ default 0x00000004 if BAT2_LENGTH_256_KBYTES
+ default 0x0000000c if BAT2_LENGTH_512_KBYTES
+ default 0x0000001c if BAT2_LENGTH_1_MBYTES
+ default 0x0000003c if BAT2_LENGTH_2_MBYTES
+ default 0x0000007c if BAT2_LENGTH_4_MBYTES
+ default 0x000000fc if BAT2_LENGTH_8_MBYTES
+ default 0x000001fc if BAT2_LENGTH_16_MBYTES
+ default 0x000003fc if BAT2_LENGTH_32_MBYTES
+ default 0x000007fc if BAT2_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT2_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT2_LENGTH_256_MBYTES
+
+config BAT2_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT2_ACCESS_NONE
+ default 0x1 if BAT2_ACCESS_RO
+ default 0x2 if BAT2_ACCESS_RW
+
+config BAT2_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x8 if !BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x10 if !BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x18 if !BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x20 if !BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x28 if !BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x30 if !BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x38 if !BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x40 if BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x48 if BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x50 if BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x58 if BAT2_ICACHE_WRITETHROUGH && !BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x60 if BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x68 if BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && !BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+ default 0x70 if BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && !BAT2_ICACHE_GUARDED
+ default 0x78 if BAT2_ICACHE_WRITETHROUGH && BAT2_ICACHE_INHIBITED && BAT2_ICACHE_MEMORYCOHERENCE && BAT2_ICACHE_GUARDED
+
+config BAT2_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x8 if !BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x10 if !BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x18 if !BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x20 if !BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x28 if !BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x30 if !BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x38 if !BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x40 if BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x48 if BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x50 if BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x58 if BAT2_DCACHE_WRITETHROUGH && !BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x60 if BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x68 if BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && !BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+ default 0x70 if BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && !BAT2_DCACHE_GUARDED
+ default 0x78 if BAT2_DCACHE_WRITETHROUGH && BAT2_DCACHE_INHIBITED && BAT2_DCACHE_MEMORYCOHERENCE && BAT2_DCACHE_GUARDED
+
+config BAT2_VALID_BITS
+ hex
+ default 0x0 if !BAT2_SUPERVISOR_MODE_VALID && !BAT2_USER_MODE_VALID
+ default 0x1 if !BAT2_SUPERVISOR_MODE_VALID && BAT2_USER_MODE_VALID
+ default 0x2 if BAT2_SUPERVISOR_MODE_VALID && !BAT2_USER_MODE_VALID
+ default 0x3 if BAT2_SUPERVISOR_MODE_VALID && BAT2_USER_MODE_VALID
+
+menuconfig BAT3
+ bool "BAT3"
+
+if BAT3
+
+config BAT3_NAME
+ string "Identifier"
+
+config BAT3_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT3_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT3_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT3_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT3_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT3_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT3_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT3_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT3_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT3_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT3_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT3_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT3_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT3_ACCESS_NONE
+ bool "No access"
+
+config BAT3_ACCESS_RO
+ bool "Read-only"
+
+config BAT3_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT3_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT3_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT3_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT3_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT3_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT3_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT3_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT3_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT3_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT3_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT3_LENGTH
+ hex
+ default 0x00000000 if BAT3_LENGTH_128_KBYTES
+ default 0x00000004 if BAT3_LENGTH_256_KBYTES
+ default 0x0000000c if BAT3_LENGTH_512_KBYTES
+ default 0x0000001c if BAT3_LENGTH_1_MBYTES
+ default 0x0000003c if BAT3_LENGTH_2_MBYTES
+ default 0x0000007c if BAT3_LENGTH_4_MBYTES
+ default 0x000000fc if BAT3_LENGTH_8_MBYTES
+ default 0x000001fc if BAT3_LENGTH_16_MBYTES
+ default 0x000003fc if BAT3_LENGTH_32_MBYTES
+ default 0x000007fc if BAT3_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT3_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT3_LENGTH_256_MBYTES
+
+config BAT3_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT3_ACCESS_NONE
+ default 0x1 if BAT3_ACCESS_RO
+ default 0x2 if BAT3_ACCESS_RW
+
+config BAT3_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x8 if !BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x10 if !BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x18 if !BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x20 if !BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x28 if !BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x30 if !BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x38 if !BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x40 if BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x48 if BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x50 if BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x58 if BAT3_ICACHE_WRITETHROUGH && !BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x60 if BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x68 if BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && !BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+ default 0x70 if BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && !BAT3_ICACHE_GUARDED
+ default 0x78 if BAT3_ICACHE_WRITETHROUGH && BAT3_ICACHE_INHIBITED && BAT3_ICACHE_MEMORYCOHERENCE && BAT3_ICACHE_GUARDED
+
+config BAT3_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x8 if !BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x10 if !BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x18 if !BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x20 if !BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x28 if !BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x30 if !BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x38 if !BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x40 if BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x48 if BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x50 if BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x58 if BAT3_DCACHE_WRITETHROUGH && !BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x60 if BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x68 if BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && !BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+ default 0x70 if BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && !BAT3_DCACHE_GUARDED
+ default 0x78 if BAT3_DCACHE_WRITETHROUGH && BAT3_DCACHE_INHIBITED && BAT3_DCACHE_MEMORYCOHERENCE && BAT3_DCACHE_GUARDED
+
+config BAT3_VALID_BITS
+ hex
+ default 0x0 if !BAT3_SUPERVISOR_MODE_VALID && !BAT3_USER_MODE_VALID
+ default 0x1 if !BAT3_SUPERVISOR_MODE_VALID && BAT3_USER_MODE_VALID
+ default 0x2 if BAT3_SUPERVISOR_MODE_VALID && !BAT3_USER_MODE_VALID
+ default 0x3 if BAT3_SUPERVISOR_MODE_VALID && BAT3_USER_MODE_VALID
+
+if HIGH_BATS
+
+menuconfig BAT4
+ bool "BAT4"
+
+if BAT4
+
+config BAT4_NAME
+ string "Identifier"
+
+config BAT4_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT4_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT4_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT4_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT4_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT4_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT4_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT4_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT4_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT4_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT4_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT4_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT4_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT4_ACCESS_NONE
+ bool "No access"
+
+config BAT4_ACCESS_RO
+ bool "Read-only"
+
+config BAT4_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT4_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT4_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT4_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT4_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT4_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT4_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT4_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT4_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT4_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT4_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT4_LENGTH
+ hex
+ default 0x00000000 if BAT4_LENGTH_128_KBYTES
+ default 0x00000004 if BAT4_LENGTH_256_KBYTES
+ default 0x0000000c if BAT4_LENGTH_512_KBYTES
+ default 0x0000001c if BAT4_LENGTH_1_MBYTES
+ default 0x0000003c if BAT4_LENGTH_2_MBYTES
+ default 0x0000007c if BAT4_LENGTH_4_MBYTES
+ default 0x000000fc if BAT4_LENGTH_8_MBYTES
+ default 0x000001fc if BAT4_LENGTH_16_MBYTES
+ default 0x000003fc if BAT4_LENGTH_32_MBYTES
+ default 0x000007fc if BAT4_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT4_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT4_LENGTH_256_MBYTES
+
+config BAT4_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT4_ACCESS_NONE
+ default 0x1 if BAT4_ACCESS_RO
+ default 0x2 if BAT4_ACCESS_RW
+
+config BAT4_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x8 if !BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x10 if !BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x18 if !BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x20 if !BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x28 if !BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x30 if !BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x38 if !BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x40 if BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x48 if BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x50 if BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x58 if BAT4_ICACHE_WRITETHROUGH && !BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x60 if BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x68 if BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && !BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+ default 0x70 if BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && !BAT4_ICACHE_GUARDED
+ default 0x78 if BAT4_ICACHE_WRITETHROUGH && BAT4_ICACHE_INHIBITED && BAT4_ICACHE_MEMORYCOHERENCE && BAT4_ICACHE_GUARDED
+
+config BAT4_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x8 if !BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x10 if !BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x18 if !BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x20 if !BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x28 if !BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x30 if !BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x38 if !BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x40 if BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x48 if BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x50 if BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x58 if BAT4_DCACHE_WRITETHROUGH && !BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x60 if BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x68 if BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && !BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+ default 0x70 if BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && !BAT4_DCACHE_GUARDED
+ default 0x78 if BAT4_DCACHE_WRITETHROUGH && BAT4_DCACHE_INHIBITED && BAT4_DCACHE_MEMORYCOHERENCE && BAT4_DCACHE_GUARDED
+
+config BAT4_VALID_BITS
+ hex
+ default 0x0 if !BAT4_SUPERVISOR_MODE_VALID && !BAT4_USER_MODE_VALID
+ default 0x1 if !BAT4_SUPERVISOR_MODE_VALID && BAT4_USER_MODE_VALID
+ default 0x2 if BAT4_SUPERVISOR_MODE_VALID && !BAT4_USER_MODE_VALID
+ default 0x3 if BAT4_SUPERVISOR_MODE_VALID && BAT4_USER_MODE_VALID
+
+menuconfig BAT5
+ bool "BAT5"
+
+if BAT5
+
+config BAT5_NAME
+ string "Identifier"
+
+config BAT5_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT5_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT5_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT5_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT5_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT5_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT5_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT5_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT5_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT5_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT5_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT5_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT5_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT5_ACCESS_NONE
+ bool "No access"
+
+config BAT5_ACCESS_RO
+ bool "Read-only"
+
+config BAT5_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT5_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT5_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT5_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT5_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT5_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT5_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT5_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT5_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT5_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT5_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT5_LENGTH
+ hex
+ default 0x00000000 if BAT5_LENGTH_128_KBYTES
+ default 0x00000004 if BAT5_LENGTH_256_KBYTES
+ default 0x0000000c if BAT5_LENGTH_512_KBYTES
+ default 0x0000001c if BAT5_LENGTH_1_MBYTES
+ default 0x0000003c if BAT5_LENGTH_2_MBYTES
+ default 0x0000007c if BAT5_LENGTH_4_MBYTES
+ default 0x000000fc if BAT5_LENGTH_8_MBYTES
+ default 0x000001fc if BAT5_LENGTH_16_MBYTES
+ default 0x000003fc if BAT5_LENGTH_32_MBYTES
+ default 0x000007fc if BAT5_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT5_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT5_LENGTH_256_MBYTES
+
+config BAT5_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT5_ACCESS_NONE
+ default 0x1 if BAT5_ACCESS_RO
+ default 0x2 if BAT5_ACCESS_RW
+
+config BAT5_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x8 if !BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x10 if !BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x18 if !BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x20 if !BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x28 if !BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x30 if !BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x38 if !BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x40 if BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x48 if BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x50 if BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x58 if BAT5_ICACHE_WRITETHROUGH && !BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x60 if BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x68 if BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && !BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+ default 0x70 if BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && !BAT5_ICACHE_GUARDED
+ default 0x78 if BAT5_ICACHE_WRITETHROUGH && BAT5_ICACHE_INHIBITED && BAT5_ICACHE_MEMORYCOHERENCE && BAT5_ICACHE_GUARDED
+
+config BAT5_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x8 if !BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x10 if !BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x18 if !BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x20 if !BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x28 if !BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x30 if !BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x38 if !BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x40 if BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x48 if BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x50 if BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x58 if BAT5_DCACHE_WRITETHROUGH && !BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x60 if BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x68 if BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && !BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+ default 0x70 if BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && !BAT5_DCACHE_GUARDED
+ default 0x78 if BAT5_DCACHE_WRITETHROUGH && BAT5_DCACHE_INHIBITED && BAT5_DCACHE_MEMORYCOHERENCE && BAT5_DCACHE_GUARDED
+
+config BAT5_VALID_BITS
+ hex
+ default 0x0 if !BAT5_SUPERVISOR_MODE_VALID && !BAT5_USER_MODE_VALID
+ default 0x1 if !BAT5_SUPERVISOR_MODE_VALID && BAT5_USER_MODE_VALID
+ default 0x2 if BAT5_SUPERVISOR_MODE_VALID && !BAT5_USER_MODE_VALID
+ default 0x3 if BAT5_SUPERVISOR_MODE_VALID && BAT5_USER_MODE_VALID
+
+menuconfig BAT6
+ bool "BAT6"
+
+if BAT6
+
+config BAT6_NAME
+ string "Identifier"
+
+config BAT6_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT6_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT6_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT6_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT6_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT6_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT6_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT6_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT6_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT6_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT6_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT6_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT6_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT6_ACCESS_NONE
+ bool "No access"
+
+config BAT6_ACCESS_RO
+ bool "Read-only"
+
+config BAT6_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT6_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT6_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT6_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT6_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT6_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT6_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT6_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT6_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT6_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT6_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT6_LENGTH
+ hex
+ default 0x00000000 if BAT6_LENGTH_128_KBYTES
+ default 0x00000004 if BAT6_LENGTH_256_KBYTES
+ default 0x0000000c if BAT6_LENGTH_512_KBYTES
+ default 0x0000001c if BAT6_LENGTH_1_MBYTES
+ default 0x0000003c if BAT6_LENGTH_2_MBYTES
+ default 0x0000007c if BAT6_LENGTH_4_MBYTES
+ default 0x000000fc if BAT6_LENGTH_8_MBYTES
+ default 0x000001fc if BAT6_LENGTH_16_MBYTES
+ default 0x000003fc if BAT6_LENGTH_32_MBYTES
+ default 0x000007fc if BAT6_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT6_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT6_LENGTH_256_MBYTES
+
+config BAT6_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT6_ACCESS_NONE
+ default 0x1 if BAT6_ACCESS_RO
+ default 0x2 if BAT6_ACCESS_RW
+
+config BAT6_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x8 if !BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x10 if !BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x18 if !BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x20 if !BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x28 if !BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x30 if !BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x38 if !BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x40 if BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x48 if BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x50 if BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x58 if BAT6_ICACHE_WRITETHROUGH && !BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x60 if BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x68 if BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && !BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+ default 0x70 if BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && !BAT6_ICACHE_GUARDED
+ default 0x78 if BAT6_ICACHE_WRITETHROUGH && BAT6_ICACHE_INHIBITED && BAT6_ICACHE_MEMORYCOHERENCE && BAT6_ICACHE_GUARDED
+
+config BAT6_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x8 if !BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x10 if !BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x18 if !BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x20 if !BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x28 if !BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x30 if !BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x38 if !BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x40 if BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x48 if BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x50 if BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x58 if BAT6_DCACHE_WRITETHROUGH && !BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x60 if BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x68 if BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && !BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+ default 0x70 if BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && !BAT6_DCACHE_GUARDED
+ default 0x78 if BAT6_DCACHE_WRITETHROUGH && BAT6_DCACHE_INHIBITED && BAT6_DCACHE_MEMORYCOHERENCE && BAT6_DCACHE_GUARDED
+
+config BAT6_VALID_BITS
+ hex
+ default 0x0 if !BAT6_SUPERVISOR_MODE_VALID && !BAT6_USER_MODE_VALID
+ default 0x1 if !BAT6_SUPERVISOR_MODE_VALID && BAT6_USER_MODE_VALID
+ default 0x2 if BAT6_SUPERVISOR_MODE_VALID && !BAT6_USER_MODE_VALID
+ default 0x3 if BAT6_SUPERVISOR_MODE_VALID && BAT6_USER_MODE_VALID
+
+menuconfig BAT7
+ bool "BAT7"
+
+if BAT7
+
+config BAT7_NAME
+ string "Identifier"
+
+config BAT7_BASE
+ hex "Base"
+
+choice
+ prompt "Block length"
+
+config BAT7_LENGTH_128_KBYTES
+ bool "128 kb"
+
+config BAT7_LENGTH_256_KBYTES
+ bool "256 kb"
+
+config BAT7_LENGTH_512_KBYTES
+ bool "512 kb"
+
+config BAT7_LENGTH_1_MBYTES
+ bool "1 mb"
+
+config BAT7_LENGTH_2_MBYTES
+ bool "2 mb"
+
+config BAT7_LENGTH_4_MBYTES
+ bool "4 mb"
+
+config BAT7_LENGTH_8_MBYTES
+ bool "8 mb"
+
+config BAT7_LENGTH_16_MBYTES
+ bool "16 mb"
+
+config BAT7_LENGTH_32_MBYTES
+ bool "32 mb"
+
+config BAT7_LENGTH_64_MBYTES
+ bool "64 mb"
+
+config BAT7_LENGTH_128_MBYTES
+ bool "128 mb"
+
+config BAT7_LENGTH_256_MBYTES
+ bool "256 mb"
+endchoice
+
+choice
+ prompt "Protection mode"
+
+config BAT7_ACCESS_NONE
+ bool "No access"
+
+config BAT7_ACCESS_RO
+ bool "Read-only"
+
+config BAT7_ACCESS_RW
+ bool "Read-write"
+
+endchoice
+
+config BAT7_ICACHE_WRITETHROUGH
+ bool "I-cache Write-through"
+
+config BAT7_ICACHE_INHIBITED
+ bool "I-cache Inhibited"
+
+config BAT7_ICACHE_MEMORYCOHERENCE
+ bool "I-cache Memory coherence"
+
+config BAT7_ICACHE_GUARDED
+ bool "I-cache Guarded"
+
+config BAT7_DCACHE_WRITETHROUGH
+ bool "D-cache Write-through"
+
+config BAT7_DCACHE_INHIBITED
+ bool "D-cache Inhibited"
+
+config BAT7_DCACHE_MEMORYCOHERENCE
+ bool "D-cache Memory coherence"
+
+config BAT7_DCACHE_GUARDED
+ bool "D-cache Guarded"
+
+config BAT7_USER_MODE_VALID
+ bool "User mode valid"
+
+config BAT7_SUPERVISOR_MODE_VALID
+ bool "Supervisor mode valid"
+
+endif
+
+config BAT7_LENGTH
+ hex
+ default 0x00000000 if BAT7_LENGTH_128_KBYTES
+ default 0x00000004 if BAT7_LENGTH_256_KBYTES
+ default 0x0000000c if BAT7_LENGTH_512_KBYTES
+ default 0x0000001c if BAT7_LENGTH_1_MBYTES
+ default 0x0000003c if BAT7_LENGTH_2_MBYTES
+ default 0x0000007c if BAT7_LENGTH_4_MBYTES
+ default 0x000000fc if BAT7_LENGTH_8_MBYTES
+ default 0x000001fc if BAT7_LENGTH_16_MBYTES
+ default 0x000003fc if BAT7_LENGTH_32_MBYTES
+ default 0x000007fc if BAT7_LENGTH_64_MBYTES
+ default 0x00000ffc if BAT7_LENGTH_128_MBYTES
+ default 0x00001ffc if BAT7_LENGTH_256_MBYTES
+
+config BAT7_PAGE_PROTECTION
+ hex
+ default 0x0 if BAT7_ACCESS_NONE
+ default 0x1 if BAT7_ACCESS_RO
+ default 0x2 if BAT7_ACCESS_RW
+
+config BAT7_WIMG_ICACHE
+ hex
+ default 0x0 if !BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x8 if !BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x10 if !BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x18 if !BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x20 if !BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x28 if !BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x30 if !BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x38 if !BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x40 if BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x48 if BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x50 if BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x58 if BAT7_ICACHE_WRITETHROUGH && !BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x60 if BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x68 if BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && !BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+ default 0x70 if BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && !BAT7_ICACHE_GUARDED
+ default 0x78 if BAT7_ICACHE_WRITETHROUGH && BAT7_ICACHE_INHIBITED && BAT7_ICACHE_MEMORYCOHERENCE && BAT7_ICACHE_GUARDED
+
+config BAT7_WIMG_DCACHE
+ hex
+ default 0x0 if !BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x8 if !BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x10 if !BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x18 if !BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x20 if !BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x28 if !BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x30 if !BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x38 if !BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x40 if BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x48 if BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x50 if BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x58 if BAT7_DCACHE_WRITETHROUGH && !BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x60 if BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x68 if BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && !BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+ default 0x70 if BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && !BAT7_DCACHE_GUARDED
+ default 0x78 if BAT7_DCACHE_WRITETHROUGH && BAT7_DCACHE_INHIBITED && BAT7_DCACHE_MEMORYCOHERENCE && BAT7_DCACHE_GUARDED
+
+config BAT7_VALID_BITS
+ hex
+ default 0x0 if !BAT7_SUPERVISOR_MODE_VALID && !BAT7_USER_MODE_VALID
+ default 0x1 if !BAT7_SUPERVISOR_MODE_VALID && BAT7_USER_MODE_VALID
+ default 0x2 if BAT7_SUPERVISOR_MODE_VALID && !BAT7_USER_MODE_VALID
+ default 0x3 if BAT7_SUPERVISOR_MODE_VALID && BAT7_USER_MODE_VALID
+
+endif
+
+endmenu
diff --git a/arch/powerpc/cpu/mpc83xx/bats/bats.h b/arch/powerpc/cpu/mpc83xx/bats/bats.h
new file mode 100644
index 0000000000..f0754c2351
--- /dev/null
+++ b/arch/powerpc/cpu/mpc83xx/bats/bats.h
@@ -0,0 +1,223 @@
+#ifdef CONFIG_BAT0
+#define CONFIG_SYS_IBAT0L (\
+ (CONFIG_BAT0_BASE) |\
+ (CONFIG_BAT0_PAGE_PROTECTION) |\
+ (CONFIG_BAT0_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT0U (\
+ (CONFIG_BAT0_BASE) |\
+ (CONFIG_BAT0_LENGTH) |\
+ (CONFIG_BAT0_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT0L (\
+ (CONFIG_BAT0_BASE) |\
+ (CONFIG_BAT0_PAGE_PROTECTION) |\
+ (CONFIG_BAT0_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT0U (\
+ (CONFIG_BAT0_BASE) |\
+ (CONFIG_BAT0_LENGTH) |\
+ (CONFIG_BAT0_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT0L (0)
+#define CONFIG_SYS_IBAT0U (0)
+#define CONFIG_SYS_DBAT0L (0)
+#define CONFIG_SYS_DBAT0U (0)
+#endif /* CONFIG_BAT0 */
+
+#ifdef CONFIG_BAT1
+#define CONFIG_SYS_IBAT1L (\
+ (CONFIG_BAT1_BASE) |\
+ (CONFIG_BAT1_PAGE_PROTECTION) |\
+ (CONFIG_BAT1_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT1U (\
+ (CONFIG_BAT1_BASE) |\
+ (CONFIG_BAT1_LENGTH) |\
+ (CONFIG_BAT1_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT1L (\
+ (CONFIG_BAT1_BASE) |\
+ (CONFIG_BAT1_PAGE_PROTECTION) |\
+ (CONFIG_BAT1_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT1U (\
+ (CONFIG_BAT1_BASE) |\
+ (CONFIG_BAT1_LENGTH) |\
+ (CONFIG_BAT1_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT1L (0)
+#define CONFIG_SYS_IBAT1U (0)
+#define CONFIG_SYS_DBAT1L (0)
+#define CONFIG_SYS_DBAT1U (0)
+#endif /* CONFIG_BAT1 */
+
+#ifdef CONFIG_BAT2
+#define CONFIG_SYS_IBAT2L (\
+ (CONFIG_BAT2_BASE) |\
+ (CONFIG_BAT2_PAGE_PROTECTION) |\
+ (CONFIG_BAT2_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT2U (\
+ (CONFIG_BAT2_BASE) |\
+ (CONFIG_BAT2_LENGTH) |\
+ (CONFIG_BAT2_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT2L (\
+ (CONFIG_BAT2_BASE) |\
+ (CONFIG_BAT2_PAGE_PROTECTION) |\
+ (CONFIG_BAT2_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT2U (\
+ (CONFIG_BAT2_BASE) |\
+ (CONFIG_BAT2_LENGTH) |\
+ (CONFIG_BAT2_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT2L (0)
+#define CONFIG_SYS_IBAT2U (0)
+#define CONFIG_SYS_DBAT2L (0)
+#define CONFIG_SYS_DBAT2U (0)
+#endif /* CONFIG_BAT2 */
+
+#ifdef CONFIG_BAT3
+#define CONFIG_SYS_IBAT3L (\
+ (CONFIG_BAT3_BASE) |\
+ (CONFIG_BAT3_PAGE_PROTECTION) |\
+ (CONFIG_BAT3_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT3U (\
+ (CONFIG_BAT3_BASE) |\
+ (CONFIG_BAT3_LENGTH) |\
+ (CONFIG_BAT3_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT3L (\
+ (CONFIG_BAT3_BASE) |\
+ (CONFIG_BAT3_PAGE_PROTECTION) |\
+ (CONFIG_BAT3_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT3U (\
+ (CONFIG_BAT3_BASE) |\
+ (CONFIG_BAT3_LENGTH) |\
+ (CONFIG_BAT3_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT3L (0)
+#define CONFIG_SYS_IBAT3U (0)
+#define CONFIG_SYS_DBAT3L (0)
+#define CONFIG_SYS_DBAT3U (0)
+#endif /* CONFIG_BAT3 */
+
+#ifdef CONFIG_BAT4
+#define CONFIG_SYS_IBAT4L (\
+ (CONFIG_BAT4_BASE) |\
+ (CONFIG_BAT4_PAGE_PROTECTION) |\
+ (CONFIG_BAT4_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT4U (\
+ (CONFIG_BAT4_BASE) |\
+ (CONFIG_BAT4_LENGTH) |\
+ (CONFIG_BAT4_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT4L (\
+ (CONFIG_BAT4_BASE) |\
+ (CONFIG_BAT4_PAGE_PROTECTION) |\
+ (CONFIG_BAT4_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT4U (\
+ (CONFIG_BAT4_BASE) |\
+ (CONFIG_BAT4_LENGTH) |\
+ (CONFIG_BAT4_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT4L (0)
+#define CONFIG_SYS_IBAT4U (0)
+#define CONFIG_SYS_DBAT4L (0)
+#define CONFIG_SYS_DBAT4U (0)
+#endif /* CONFIG_BAT4 */
+
+#ifdef CONFIG_BAT5
+#define CONFIG_SYS_IBAT5L (\
+ (CONFIG_BAT5_BASE) |\
+ (CONFIG_BAT5_PAGE_PROTECTION) |\
+ (CONFIG_BAT5_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT5U (\
+ (CONFIG_BAT5_BASE) |\
+ (CONFIG_BAT5_LENGTH) |\
+ (CONFIG_BAT5_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT5L (\
+ (CONFIG_BAT5_BASE) |\
+ (CONFIG_BAT5_PAGE_PROTECTION) |\
+ (CONFIG_BAT5_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT5U (\
+ (CONFIG_BAT5_BASE) |\
+ (CONFIG_BAT5_LENGTH) |\
+ (CONFIG_BAT5_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT5L (0)
+#define CONFIG_SYS_IBAT5U (0)
+#define CONFIG_SYS_DBAT5L (0)
+#define CONFIG_SYS_DBAT5U (0)
+#endif /* CONFIG_BAT5 */
+
+#ifdef CONFIG_BAT6
+#define CONFIG_SYS_IBAT6L (\
+ (CONFIG_BAT6_BASE) |\
+ (CONFIG_BAT6_PAGE_PROTECTION) |\
+ (CONFIG_BAT6_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT6U (\
+ (CONFIG_BAT6_BASE) |\
+ (CONFIG_BAT6_LENGTH) |\
+ (CONFIG_BAT6_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT6L (\
+ (CONFIG_BAT6_BASE) |\
+ (CONFIG_BAT6_PAGE_PROTECTION) |\
+ (CONFIG_BAT6_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT6U (\
+ (CONFIG_BAT6_BASE) |\
+ (CONFIG_BAT6_LENGTH) |\
+ (CONFIG_BAT6_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT6L (0)
+#define CONFIG_SYS_IBAT6U (0)
+#define CONFIG_SYS_DBAT6L (0)
+#define CONFIG_SYS_DBAT6U (0)
+#endif /* CONFIG_BAT6 */
+
+#ifdef CONFIG_BAT7
+#define CONFIG_SYS_IBAT7L (\
+ (CONFIG_BAT7_BASE) |\
+ (CONFIG_BAT7_PAGE_PROTECTION) |\
+ (CONFIG_BAT7_WIMG_ICACHE) \
+ )
+#define CONFIG_SYS_IBAT7U (\
+ (CONFIG_BAT7_BASE) |\
+ (CONFIG_BAT7_LENGTH) |\
+ (CONFIG_BAT7_VALID_BITS) \
+ )
+#define CONFIG_SYS_DBAT7L (\
+ (CONFIG_BAT7_BASE) |\
+ (CONFIG_BAT7_PAGE_PROTECTION) |\
+ (CONFIG_BAT7_WIMG_DCACHE) \
+ )
+#define CONFIG_SYS_DBAT7U (\
+ (CONFIG_BAT7_BASE) |\
+ (CONFIG_BAT7_LENGTH) |\
+ (CONFIG_BAT7_VALID_BITS) \
+ )
+#else
+#define CONFIG_SYS_IBAT7L (0)
+#define CONFIG_SYS_IBAT7U (0)
+#define CONFIG_SYS_DBAT7L (0)
+#define CONFIG_SYS_DBAT7U (0)
+#endif /* CONFIG_BAT7 */
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 77170a7424..f7fc922af0 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -25,6 +25,7 @@
#include <asm/u-boot.h>
#include "hrcw/hrcw.h"
+#include "bats/bats.h"
/* We don't want the MMU yet.
*/
diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index 042f6aa010..14136f6b67 100644
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -10,6 +10,42 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index 641c6c8545..8e34ee2c2b 100644
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -12,6 +12,51 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index b1a4bcbc53..a2f7eb5837 100644
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -11,6 +11,51 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index 306f4cc80c..9946bf965e 100644
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -13,6 +13,51 @@ CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_SMALL=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index 951ef72445..ffa22bfb83 100644
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -12,6 +12,51 @@ CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_ROM_INTERFACE_NAND_FLASH_8BIT_SMALL=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO_BASE"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index 149e71c310..43daee1f19 100644
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -12,6 +12,62 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_32_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="PCI_MEM_PHYS"
+CONFIG_BAT4_BASE=0x80000000
+CONFIG_BAT4_LENGTH_256_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="PCI_MMIO_PHYS"
+CONFIG_BAT5_BASE=0x90000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC8323ERDB_defconfig b/configs/MPC8323ERDB_defconfig
index 49e690e88b..9039652d4b 100644
--- a/configs/MPC8323ERDB_defconfig
+++ b/configs/MPC8323ERDB_defconfig
@@ -10,6 +10,62 @@ CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_32_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="PCI_MEM_PHYS"
+CONFIG_BAT5_BASE=0x80000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="PCI1_MMIO_PHYS"
+CONFIG_BAT6_BASE=0x90000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_INHIBITED=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC832XEMDS_ATM_defconfig b/configs/MPC832XEMDS_ATM_defconfig
index 323b368f9e..aefb01f150 100644
--- a/configs/MPC832XEMDS_ATM_defconfig
+++ b/configs/MPC832XEMDS_ATM_defconfig
@@ -10,6 +10,52 @@ CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="BCSR"
+CONFIG_BAT2_BASE=0xF8000000
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xFE000000
+CONFIG_BAT3_LENGTH_32_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1"
diff --git a/configs/MPC832XEMDS_HOST_33_defconfig b/configs/MPC832XEMDS_HOST_33_defconfig
index a13dcfb91d..f410f8dac0 100644
--- a/configs/MPC832XEMDS_HOST_33_defconfig
+++ b/configs/MPC832XEMDS_HOST_33_defconfig
@@ -10,6 +10,72 @@ CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="BCSR"
+CONFIG_BAT2_BASE=0xF8000000
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xFE000000
+CONFIG_BAT3_LENGTH_32_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="PCI_MEM_PHYS"
+CONFIG_BAT6_BASE=0x80000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="PCI1_MMIO_PHYS"
+CONFIG_BAT7_BASE=0x90000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI_33M,PQ_MDS_PIB=1"
diff --git a/configs/MPC832XEMDS_HOST_66_defconfig b/configs/MPC832XEMDS_HOST_66_defconfig
index 2a4ff9a3e1..dac8f28a4d 100644
--- a/configs/MPC832XEMDS_HOST_66_defconfig
+++ b/configs/MPC832XEMDS_HOST_66_defconfig
@@ -10,6 +10,72 @@ CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="BCSR"
+CONFIG_BAT2_BASE=0xF8000000
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xFE000000
+CONFIG_BAT3_LENGTH_32_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="PCI_MEM_PHYS"
+CONFIG_BAT6_BASE=0x80000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="PCI1_MMIO_PHYS"
+CONFIG_BAT7_BASE=0x90000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCI_66M,PQ_MDS_PIB=1"
diff --git a/configs/MPC832XEMDS_SLAVE_defconfig b/configs/MPC832XEMDS_SLAVE_defconfig
index e7ea39a236..c1cb69ad93 100644
--- a/configs/MPC832XEMDS_SLAVE_defconfig
+++ b/configs/MPC832XEMDS_SLAVE_defconfig
@@ -7,6 +7,72 @@ CONFIG_TARGET_MPC832XEMDS=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="BCSR"
+CONFIG_BAT2_BASE=0xF8000000
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xFE000000
+CONFIG_BAT3_LENGTH_32_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="PCI_MEM_PHYS"
+CONFIG_BAT6_BASE=0x80000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="PCI1_MMIO_PHYS"
+CONFIG_BAT7_BASE=0x90000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
diff --git a/configs/MPC832XEMDS_defconfig b/configs/MPC832XEMDS_defconfig
index bffc55b917..38e0b7f6de 100644
--- a/configs/MPC832XEMDS_defconfig
+++ b/configs/MPC832XEMDS_defconfig
@@ -10,6 +10,52 @@ CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="BCSR"
+CONFIG_BAT2_BASE=0xF8000000
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xFE000000
+CONFIG_BAT3_LENGTH_32_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig
index 11bce06a09..6daab44b62 100644
--- a/configs/MPC8349EMDS_PCI64_defconfig
+++ b/configs/MPC8349EMDS_PCI64_defconfig
@@ -14,6 +14,37 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC8349EMDS_SDRAM_defconfig b/configs/MPC8349EMDS_SDRAM_defconfig
index 6b571b0368..d3f42f99e0 100644
--- a/configs/MPC8349EMDS_SDRAM_defconfig
+++ b/configs/MPC8349EMDS_SDRAM_defconfig
@@ -14,6 +14,37 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig
index 87892c3d67..c264f7b53d 100644
--- a/configs/MPC8349EMDS_SLAVE_defconfig
+++ b/configs/MPC8349EMDS_SLAVE_defconfig
@@ -12,6 +12,37 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 40633d19be..4018d81825 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -14,6 +14,37 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_PCI_ONE_PCI1=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index 9e466b1bd1..0434118419 100644
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -14,6 +14,77 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="PCI2_MEM"
+CONFIG_BAT3_BASE=0xA0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="PCI2_MMIO"
+CONFIG_BAT4_BASE=0xB0000000
+CONFIG_BAT4_LENGTH_256_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_INHIBITED=y
+CONFIG_BAT4_ICACHE_GUARDED=y
+CONFIG_BAT4_DCACHE_INHIBITED=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xFE000000"
diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index 3a61235736..de97bb15b2 100644
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -14,6 +14,77 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="PCI2_MEM"
+CONFIG_BAT3_BASE=0xA0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="PCI2_MMIO"
+CONFIG_BAT4_BASE=0xB0000000
+CONFIG_BAT4_LENGTH_256_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_INHIBITED=y
+CONFIG_BAT4_ICACHE_GUARDED=y
+CONFIG_BAT4_DCACHE_INHIBITED=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index ed9bd83302..b1e687ceab 100644
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -13,6 +13,77 @@ CONFIG_PCI_INT_ARBITER2_ENABLE=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="PCI2_MEM"
+CONFIG_BAT3_BASE=0xA0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="PCI2_MMIO"
+CONFIG_BAT4_BASE=0xB0000000
+CONFIG_BAT4_LENGTH_256_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_INHIBITED=y
+CONFIG_BAT4_ICACHE_GUARDED=y
+CONFIG_BAT4_DCACHE_INHIBITED=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="STACK_IN_DCACHE"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 73ba7dc632..86b9f6071a 100644
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -14,6 +14,81 @@ CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="SDRAM_UPPER"
+CONFIG_BAT1_BASE=0x10000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="IMMR"
+CONFIG_BAT2_BASE=0xE0000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="BCSR"
+CONFIG_BAT3_BASE=0xF8000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_INHIBITED=y
+CONFIG_BAT3_ICACHE_GUARDED=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="FLASH"
+CONFIG_BAT4_BASE=0xFE000000
+CONFIG_BAT4_LENGTH_32_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_DCACHE_INHIBITED=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="PCI_MEM"
+CONFIG_BAT6_BASE=0x80000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="PCI_MMIO"
+CONFIG_BAT7_BASE=0x90000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC837XEMDS_SLAVE_defconfig b/configs/MPC837XEMDS_SLAVE_defconfig
index 8a50ff16d0..44c23eade5 100644
--- a/configs/MPC837XEMDS_SLAVE_defconfig
+++ b/configs/MPC837XEMDS_SLAVE_defconfig
@@ -10,6 +10,45 @@ CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="SDRAM_UPPER"
+CONFIG_BAT1_BASE=0x10000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="IMMR"
+CONFIG_BAT2_BASE=0xE0000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="BCSR"
+CONFIG_BAT3_BASE=0xF8000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_INHIBITED=y
+CONFIG_BAT3_ICACHE_GUARDED=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index cf0694f3b5..f21cdbd179 100644
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -14,6 +14,61 @@ CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="SDRAM_UPPER"
+CONFIG_BAT1_BASE=0x10000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="IMMR"
+CONFIG_BAT2_BASE=0xE0000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="BCSR"
+CONFIG_BAT3_BASE=0xF8000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_INHIBITED=y
+CONFIG_BAT3_ICACHE_GUARDED=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="FLASH"
+CONFIG_BAT4_BASE=0xFE000000
+CONFIG_BAT4_LENGTH_32_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_DCACHE_INHIBITED=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACK_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/MPC837XERDB_SLAVE_defconfig b/configs/MPC837XERDB_SLAVE_defconfig
index e145504ded..d1455b0e9d 100644
--- a/configs/MPC837XERDB_SLAVE_defconfig
+++ b/configs/MPC837XERDB_SLAVE_defconfig
@@ -10,6 +10,45 @@ CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="SDRAM_UPPER"
+CONFIG_BAT1_BASE=0x10000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="IMMR"
+CONFIG_BAT2_BASE=0xE0000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="L2_SWITCH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_INHIBITED=y
+CONFIG_BAT3_ICACHE_GUARDED=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE,PCIE"
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index 03fd7b70ba..e6138c06fc 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -14,6 +14,81 @@ CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="SDRAM_UPPER"
+CONFIG_BAT1_BASE=0x10000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="IMMR"
+CONFIG_BAT2_BASE=0xE0000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="L2_SWITCH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_INHIBITED=y
+CONFIG_BAT3_ICACHE_GUARDED=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="FLASH"
+CONFIG_BAT4_BASE=0xFE000000
+CONFIG_BAT4_LENGTH_32_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_DCACHE_INHIBITED=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="STACH_IN_DCACHE"
+CONFIG_BAT5_BASE=0xE6000000
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="PCI_MEM"
+CONFIG_BAT6_BASE=0x80000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="PCI_MMIO"
+CONFIG_BAT7_BASE=0x90000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="PCIE"
diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index c746afd1fd..677f0513a3 100644
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -13,6 +13,85 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="SDRAM_UPPER"
+CONFIG_BAT1_BASE=0x10000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="STACK_IN_DCACHE"
+CONFIG_BAT2_BASE=0x20000000
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="PCI_MEM_BASE"
+CONFIG_BAT3_BASE=0x90000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="PCI_MMIO"
+CONFIG_BAT4_BASE=0xA0000000
+CONFIG_BAT4_LENGTH_256_MBYTES=y
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_ICACHE_GUARDED=y
+CONFIG_BAT4_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT4_DCACHE_GUARDED=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="PCI_IO"
+CONFIG_BAT5_BASE=0xE2000000
+CONFIG_BAT5_LENGTH_16_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="IMMR"
+CONFIG_BAT6_BASE=0xFF400000
+CONFIG_BAT6_LENGTH_1_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_INHIBITED=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="FLASH"
+CONFIG_BAT7_BASE=0x80000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/caddy2_defconfig b/configs/caddy2_defconfig
index b52ea881ce..2665e72573 100644
--- a/configs/caddy2_defconfig
+++ b/configs/caddy2_defconfig
@@ -14,6 +14,55 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR_PCIIO"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="UNKNOWN"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index 97fe0e06fe..deed831c11 100644
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -10,6 +10,42 @@ CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 83dd6bf3a9..c113543472 100644
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -10,6 +10,42 @@ CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_RGMII=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index a8619ef621..4afed47033 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -7,6 +7,52 @@ CONFIG_TARGET_IDS8313=y
CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_PCI_HOST_MODE_ENABLE=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_8BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="INITRAM"
+CONFIG_BAT1_BASE=0xFD000000
+CONFIG_BAT1_LENGTH_256_KBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFF800000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR"
+CONFIG_BAT5_BASE=0xF0000000
+CONFIG_BAT5_LENGTH_128_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="NAND_MRAM_CPLD"
+CONFIG_BAT6_BASE=0xE0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_FIT=y
CONFIG_FIT_SIGNATURE=y
CONFIG_IMAGE_FORMAT_LEGACY=y
diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig
index 03437f7cb8..a358e28886 100644
--- a/configs/kmcoge5ne_defconfig
+++ b/configs/kmcoge5ne_defconfig
@@ -13,6 +13,85 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_LALE_TIMING_EARLIER=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM_LOWER"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="PAXE"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="BFTIC3"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="SDRAM_UPPER"
+CONFIG_BAT7_BASE=0x10000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_INHIBITED=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_INHIBITED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig
index 600a1ad1dc..10f7fdf110 100644
--- a/configs/kmeter1_defconfig
+++ b/configs/kmeter1_defconfig
@@ -2,6 +2,7 @@ CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0xF0000000
CONFIG_SYS_CLK_FREQ=66000000
CONFIG_MPC83xx=y
+CONFIG_HIGH_BATS=y
CONFIG_TARGET_KMETER1=y
CONFIG_DDR_MC_CLOCK_MODE_1_1=y
CONFIG_SYSTEM_PLL_VCO_DIV_4=y
@@ -12,6 +13,58 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_LALE_TIMING_EARLIER=y
CONFIG_LDP_PIN_MUX_STATE_0=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="PAXE"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig
index ba489eeb6a..b32b39113f 100644
--- a/configs/kmopti2_defconfig
+++ b/configs/kmopti2_defconfig
@@ -8,6 +8,74 @@ CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="APP2"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig
index f39bca4fbd..cc94d174f0 100644
--- a/configs/kmsupx5_defconfig
+++ b/configs/kmsupx5_defconfig
@@ -8,6 +8,64 @@ CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index 3e7b2f73fd..994e1525f7 100644
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -9,6 +9,64 @@ CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="APP2"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1"
diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig
index 0f32283e9d..bb23786057 100644
--- a/configs/kmtepr2_defconfig
+++ b/configs/kmtepr2_defconfig
@@ -8,6 +8,74 @@ CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="APP2"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig
index ec3ff28793..666dbf32cc 100644
--- a/configs/kmvect1_defconfig
+++ b/configs/kmvect1_defconfig
@@ -9,6 +9,74 @@ CONFIG_CORE_PLL_RATIO_2_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="APP2"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="KMVECT1"
diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index cb24c97f04..f583fa922e 100644
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -8,6 +8,42 @@ CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFC000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACKINDCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=5
diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig
index 47feb5ae36..f8ce309376 100644
--- a/configs/sbc8349_PCI_33_defconfig
+++ b/configs/sbc8349_PCI_33_defconfig
@@ -14,6 +14,57 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR_PCIIO"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="LBC_INITRAM_FLASH"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig
index 019341691f..bc9e228894 100644
--- a/configs/sbc8349_PCI_66_defconfig
+++ b/configs/sbc8349_PCI_66_defconfig
@@ -14,6 +14,57 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR_PCIIO"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="LBC_INITRAM_FLASH"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig
index f7c3de8e9e..d8e60da7be 100644
--- a/configs/sbc8349_defconfig
+++ b/configs/sbc8349_defconfig
@@ -14,6 +14,37 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR_PCIIO"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="LBC_INITRAM_FLASH"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index c2faf3855e..508ffe201a 100644
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -9,6 +9,42 @@ CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index cff81f41f5..514db1c213 100644
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -9,6 +9,42 @@ CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index f72bec439b..a998585f3a 100644
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -9,6 +9,42 @@ CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index 0e43049663..48579c7563 100644
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -9,6 +9,42 @@ CONFIG_SYSTEM_PLL_FACTOR_4_1=y
CONFIG_CORE_PLL_RATIO_3_1=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC2_MODE_RGMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="DDR"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_128_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMRBAR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_8_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="FLASH"
+CONFIG_BAT2_BASE=0xFE000000
+CONFIG_BAT2_LENGTH_8_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="STACK_IN_DCACHE"
+CONFIG_BAT3_BASE=0xE6000000
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
CONFIG_CMD_IOLOOP=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
index b6f17d2f29..4dd36cac91 100644
--- a/configs/suvd3_defconfig
+++ b/configs/suvd3_defconfig
@@ -8,6 +8,74 @@ CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="APP2"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig
index 445b89d483..7db157bf21 100644
--- a/configs/tuge1_defconfig
+++ b/configs/tuge1_defconfig
@@ -8,6 +8,64 @@ CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig
index d7b0a94ada..e0c1366291 100644
--- a/configs/tuxx1_defconfig
+++ b/configs/tuxx1_defconfig
@@ -8,6 +8,74 @@ CONFIG_CORE_PLL_RATIO_25_1=y
CONFIG_QUICC_MULT_FACTOR_3=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_INHIBITED=y
+CONFIG_BAT0_ICACHE_GUARDED=y
+CONFIG_BAT0_DCACHE_INHIBITED=y
+CONFIG_BAT0_DCACHE_GUARDED=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="IMMR"
+CONFIG_BAT1_BASE=0xE0000000
+CONFIG_BAT1_LENGTH_4_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_INHIBITED=y
+CONFIG_BAT1_ICACHE_GUARDED=y
+CONFIG_BAT1_DCACHE_INHIBITED=y
+CONFIG_BAT1_DCACHE_GUARDED=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="KMBEC_FPGA"
+CONFIG_BAT2_BASE=0xE8000000
+CONFIG_BAT2_LENGTH_128_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT3=y
+CONFIG_BAT3_NAME="FLASH"
+CONFIG_BAT3_BASE=0xF0000000
+CONFIG_BAT3_LENGTH_256_MBYTES=y
+CONFIG_BAT3_ACCESS_RW=y
+CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT3_DCACHE_INHIBITED=y
+CONFIG_BAT3_DCACHE_GUARDED=y
+CONFIG_BAT3_USER_MODE_VALID=y
+CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT4=y
+CONFIG_BAT4_NAME="STACK_IN_DCACHE"
+CONFIG_BAT4_BASE=0xE6000000
+CONFIG_BAT4_ACCESS_RW=y
+CONFIG_BAT4_USER_MODE_VALID=y
+CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="APP1"
+CONFIG_BAT5_BASE=0xA0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="APP2"
+CONFIG_BAT6_BASE=0xB0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_INHIBITED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig
index 52a51cc5bb..517c4aa854 100644
--- a/configs/ve8313_defconfig
+++ b/configs/ve8313_defconfig
@@ -11,6 +11,60 @@ CONFIG_PCI_INT_ARBITER1_ENABLE=y
CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_LALE_TIMING_EARLIER=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR_PCIIO_BCSR"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="INITRAM_FLASH"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_GUARDED=y
+CONFIG_BAT6_DCACHE_GUARDED=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT7=y
+CONFIG_BAT7_NAME="FPGA_SRAM_NAND"
+CONFIG_BAT7_BASE=0x60000000
+CONFIG_BAT7_LENGTH_256_MBYTES=y
+CONFIG_BAT7_ACCESS_RW=y
+CONFIG_BAT7_ICACHE_GUARDED=y
+CONFIG_BAT7_DCACHE_GUARDED=y
+CONFIG_BAT7_USER_MODE_VALID=y
+CONFIG_BAT7_SUPERVISOR_MODE_VALID=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=6
diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index 3f1f5c069b..b7cf6a44bc 100644
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -14,6 +14,55 @@ CONFIG_BOOT_MEMORY_SPACE_LOW=y
CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
CONFIG_TSEC1_MODE_GMII=y
CONFIG_TSEC2_MODE_GMII=y
+CONFIG_BAT0=y
+CONFIG_BAT0_NAME="SDRAM"
+CONFIG_BAT0_BASE=0x00000000
+CONFIG_BAT0_LENGTH_256_MBYTES=y
+CONFIG_BAT0_ACCESS_RW=y
+CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT0_USER_MODE_VALID=y
+CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT1=y
+CONFIG_BAT1_NAME="PCI1_MEM"
+CONFIG_BAT1_BASE=0x80000000
+CONFIG_BAT1_LENGTH_256_MBYTES=y
+CONFIG_BAT1_ACCESS_RW=y
+CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT1_USER_MODE_VALID=y
+CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT2=y
+CONFIG_BAT2_NAME="PCI1_MMIO"
+CONFIG_BAT2_BASE=0x90000000
+CONFIG_BAT2_LENGTH_256_MBYTES=y
+CONFIG_BAT2_ACCESS_RW=y
+CONFIG_BAT2_ICACHE_INHIBITED=y
+CONFIG_BAT2_ICACHE_GUARDED=y
+CONFIG_BAT2_DCACHE_INHIBITED=y
+CONFIG_BAT2_DCACHE_GUARDED=y
+CONFIG_BAT2_USER_MODE_VALID=y
+CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT5=y
+CONFIG_BAT5_NAME="IMMR_PCIIO"
+CONFIG_BAT5_BASE=0xE0000000
+CONFIG_BAT5_LENGTH_256_MBYTES=y
+CONFIG_BAT5_ACCESS_RW=y
+CONFIG_BAT5_ICACHE_INHIBITED=y
+CONFIG_BAT5_ICACHE_GUARDED=y
+CONFIG_BAT5_DCACHE_INHIBITED=y
+CONFIG_BAT5_DCACHE_GUARDED=y
+CONFIG_BAT5_USER_MODE_VALID=y
+CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
+CONFIG_BAT6=y
+CONFIG_BAT6_NAME="UNKNOWN"
+CONFIG_BAT6_BASE=0xF0000000
+CONFIG_BAT6_LENGTH_256_MBYTES=y
+CONFIG_BAT6_ACCESS_RW=y
+CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_DCACHE_MEMORYCOHERENCE=y
+CONFIG_BAT6_USER_MODE_VALID=y
+CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
CONFIG_PCI_64BIT=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index db283578b9..dc7a8b8aa8 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -388,43 +388,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_8M | BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE | BATU_BL_8M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/*
* Environment Configuration
*/
diff --git a/include/configs/MPC8313ERDB_NAND.h b/include/configs/MPC8313ERDB_NAND.h
index e3bcc63e13..596d39ee5e 100644
--- a/include/configs/MPC8313ERDB_NAND.h
+++ b/include/configs/MPC8313ERDB_NAND.h
@@ -438,68 +438,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI @ 0x80000000 */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI2 not supported on 8313 */
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
/*
* Environment Configuration
*/
diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h
index af2432b12d..9d1ce200ec 100644
--- a/include/configs/MPC8313ERDB_NOR.h
+++ b/include/configs/MPC8313ERDB_NOR.h
@@ -412,68 +412,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI @ 0x80000000 */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI2 not supported on 8313 */
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
/*
* Environment Configuration
*/
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index d2f9309cd6..fb568efe2d 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -405,85 +405,6 @@
* MMU Setup
*/
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_128M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR \
- | BATU_BL_8M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE \
- | BATU_BL_32M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_INIT_RAM_ADDR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* PCI MEM space: cacheable */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI_MEM_PHYS \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI_MEM_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/* PCI MMIO space: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI_MMIO_PHYS \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI_MMIO_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#define CONFIG_SYS_IBAT6L 0
-#define CONFIG_SYS_IBAT6U 0
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L 0
-#define CONFIG_SYS_IBAT7U 0
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 37f173ef74..489e7c3368 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -297,100 +297,6 @@
HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
-/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR \
- | BATU_BL_4M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE \
- | BATU_BL_32M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-#ifdef CONFIG_PCI
-/* PCI MEM space: cacheable */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_MEM_PHYS \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_MEM_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-/* PCI MMIO space: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI1_MMIO_PHYS \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI1_MMIO_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#else
-#define CONFIG_SYS_IBAT5L (0)
-#define CONFIG_SYS_IBAT5U (0)
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#endif
-
-/* Nothing in BAT7 */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if (CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index d8cadde0e0..15fca456cc 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -360,106 +360,6 @@
HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
-/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR \
- | BATU_BL_4M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* BCSR: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_BCSR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_BCSR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE \
- | BATU_BL_32M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_INIT_RAM_ADDR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#ifdef CONFIG_PCI
-/* PCI MEM space: cacheable */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI1_MEM_PHYS \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI1_MEM_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-/* PCI MMIO space: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI1_MMIO_PHYS \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI1_MMIO_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-#else
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-#endif
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index d70e477f80..e4d90589e9 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -382,103 +382,10 @@
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI @ 0x80000000 */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
#endif
-#ifdef CONFIG_MPC83XX_PCI2
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#endif
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 286654066c..a24a2011d2 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -454,103 +454,10 @@
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI @ 0x80000000 */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
#endif
-#ifdef CONFIG_MPC83XX_PCI2
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#endif
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index e7031e94fd..aeee6e0408 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -482,102 +482,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI */
-#ifdef CONFIG_PCI
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L 0
-#define CONFIG_SYS_IBAT1U 0
-#define CONFIG_SYS_IBAT2L 0
-#define CONFIG_SYS_IBAT2U 0
-#endif
-
-#ifdef CONFIG_MPC83XX_PCI2
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L 0
-#define CONFIG_SYS_IBAT3U 0
-#define CONFIG_SYS_IBAT4L 0
-#define CONFIG_SYS_IBAT4U 0
-#endif
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-#define CONFIG_SYS_IBAT7L 0
-#define CONFIG_SYS_IBAT7U 0
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 3473ca6102..01a3a77e99 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -420,114 +420,6 @@ extern int board_pci_host_broken(void);
HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
-/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_SDRAM_LOWER CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_UPPER (CONFIG_SYS_SDRAM_BASE + 0x10000000)
-
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_LOWER \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_LOWER \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_SDRAM_UPPER \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_SDRAM_UPPER \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_IMMR \
- | BATU_BL_8M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* BCSR: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_BCSR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_BCSR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_FLASH_BASE \
- | BATU_BL_32M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT4L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_INIT_RAM_ADDR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#ifdef CONFIG_PCI
-/* PCI MEM space: cacheable */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI_MEM_PHYS \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI_MEM_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-/* PCI MMIO space: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI_MMIO_PHYS \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI_MMIO_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-#else
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-#endif
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 9ddd2af0d9..9a4eeb6390 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -435,114 +435,6 @@
| HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
-/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_SDRAM_LOWER CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_UPPER (CONFIG_SYS_SDRAM_BASE + 0x10000000)
-
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_LOWER \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_LOWER \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_SDRAM_UPPER \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_SDRAM_UPPER \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_IMMR \
- | BATU_BL_8M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* L2 Switch: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_VSC7385_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_VSC7385_BASE \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_FLASH_BASE \
- | BATU_BL_32M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT4L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_INIT_RAM_ADDR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#ifdef CONFIG_PCI
-/* PCI MEM space: cacheable */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI_MEM_PHYS \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI_MEM_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-/* PCI MMIO space: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI_MMIO_PHYS \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI_MMIO_PHYS \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-#else
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-#endif
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index c27a04ace9..c5a6203001 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -270,103 +270,11 @@
HID0_ENABLE_INSTRUCTION_CACHE)
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR 0 - 512M */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_SDRAM_BASE + 0x10000000 \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_SDRAM_BASE + 0x10000000 \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* stack in DCACHE @ 512M (no backing mem) */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_INIT_RAM_ADDR \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_INIT_RAM_ADDR \
- | BATU_BL_128K \
- | BATU_VS \
- | BATU_VP)
-
/* PCI */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_IO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE \
- | BATU_BL_16M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#define CONFIG_SYS_IBAT5L (0)
-#define CONFIG_SYS_IBAT5U (0)
#endif
-/* IMMRBAR */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_IMMR \
- | BATU_BL_1M \
- | BATU_VS \
- | BATU_VP)
-
-/* FLASH */
-#define CONFIG_SYS_IBAT7L (CONFIG_SYS_FLASH_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT7U (CONFIG_SYS_FLASH_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h
index 007ded0299..f4ee222808 100644
--- a/include/configs/caddy2.h
+++ b/include/configs/caddy2.h
@@ -302,82 +302,10 @@
#define CONFIG_SYS_GPIO2_DIR 0x78900000
#define CONFIG_SYS_GPIO2_DAT 0x70100000
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-
-/* PCI @ 0x80000000 */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
-#endif
-
-#ifdef CONFIG_MPC83XX_PCI2
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
#endif
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#if (CONFIG_SYS_DDR_SIZE == 512)
-#define CONFIG_SYS_IBAT7L (CONFIG_SYS_SDRAM_BASE+0x10000000 | \
- BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT7U (CONFIG_SYS_SDRAM_BASE+0x10000000 | \
- BATU_BL_256M | BATU_VS | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#endif
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index c1fe6b45bd..c8fabf9da5 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -483,43 +483,6 @@ void fpga_control_clear(unsigned int bus, int pin);
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR, PCI IO and FPGA: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_8M | BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE | BATU_BL_8M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/*
* Environment Configuration
*/
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index ac151dccba..120eb0a6b7 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -283,83 +283,6 @@
#define CONFIG_SYS_SCCR_USBDRCM 3
/*
- * BAT's
- */
-
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE |\
- BATL_PP_10)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE |\
- BATU_BL_256M |\
- BATU_VS |\
- BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* Initial RAM @ 0xFD000000 */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_INIT_RAM_ADDR |\
- BATL_PP_10 |\
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_INIT_RAM_ADDR |\
- BATU_BL_256K |\
- BATU_VS |\
- BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH @ 0xFF800000 */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE |\
- BATL_PP_10 |\
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE |\
- BATU_BL_8M |\
- BATU_VS |\
- BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE |\
- BATL_PP_10 |\
- BATL_CACHEINHIBIT |\
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/* IMMRBAR @ 0xF0000000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR |\
- BATL_PP_10 |\
- BATL_CACHEINHIBIT |\
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR |\
- BATU_BL_128M |\
- BATU_VS |\
- BATU_VP)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-/* NAND-Flash @ 0xE1000000, MRAM @ 0xE2000000, CPLD @ 0xE3000000 */
-#define CONFIG_SYS_IBAT6L (0xE0000000 |\
- BATL_PP_10 |\
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xE0000000 |\
- BATU_BL_256M |\
- BATU_VS |\
- BATU_VP)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
-/*
* U-Boot environment setup
*/
#define CONFIG_BOOTP_BOOTFILESIZE
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index a45ea521ac..a4a0fb222b 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -235,51 +235,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -434,62 +389,6 @@
OR_GPCM_TRLX |\
OR_GPCM_EAD)
-/*
- * MMU Setup
- */
-
-/* PAXE: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (\
- CONFIG_SYS_PAXE_BASE | \
- BATL_PP_10 | \
- BATL_MEMCOHERENCE)
-
-#define CONFIG_SYS_IBAT5U (\
- CONFIG_SYS_PAXE_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-
-#define CONFIG_SYS_DBAT5L (\
- CONFIG_SYS_PAXE_BASE | \
- BATL_PP_10 | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-/* BFTIC3: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (\
- CONFIG_SYS_BFTIC3_BASE | \
- BATL_PP_10 | \
- BATL_MEMCOHERENCE)
-
-#define CONFIG_SYS_IBAT6U (\
- CONFIG_SYS_BFTIC3_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-
-#define CONFIG_SYS_DBAT6L (\
- CONFIG_SYS_BFTIC3_BASE | \
- BATL_PP_10 | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-/* DDR/LBC SDRAM next 256M: cacheable */
-#define CONFIG_SYS_IBAT7L (\
- CONFIG_SYS_SDRAM_BASE2 |\
- BATL_PP_10 |\
- BATL_CACHEINHIBIT |\
- BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_IBAT7U (\
- CONFIG_SYS_SDRAM_BASE2 |\
- BATU_BL_256M |\
- BATU_VS |\
- BATU_VP)
/* enable POST tests */
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
#define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
@@ -497,7 +396,4 @@
#define CONFIG_TESTPIN_REG gprt3 /* for kmcoge5ne */
#define CONFIG_TESTPIN_MASK 0x20 /* for kmcoge5ne */
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#endif /* CONFIG */
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index 2d7b3106dd..f6c7cfce43 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -221,51 +221,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -395,36 +350,4 @@
OR_GPCM_TRLX | \
OR_GPCM_EAD)
-/*
- * MMU Setup
- */
-
-/* PAXE: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (\
- CONFIG_SYS_PAXE_BASE | \
- BATL_PP_10 | \
- BATL_MEMCOHERENCE)
-
-#define CONFIG_SYS_IBAT5U (\
- CONFIG_SYS_PAXE_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-
-#define CONFIG_SYS_DBAT5L (\
- CONFIG_SYS_PAXE_BASE | \
- BATL_PP_10 | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#endif /* CONFIG */
diff --git a/include/configs/kmopti2.h b/include/configs/kmopti2.h
index 2f19b2e9ef..6ac36c0f92 100644
--- a/include/configs/kmopti2.h
+++ b/include/configs/kmopti2.h
@@ -240,51 +240,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -389,14 +344,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
@@ -451,41 +398,5 @@
OR_GPCM_SCY_4 | \
OR_GPCM_TRLX_CLEAR | \
OR_GPCM_EHTR_CLEAR)
-/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-/* 512M should also include APP2... */
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-/* APP2: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif /* __CONFIG_H */
diff --git a/include/configs/kmsupx5.h b/include/configs/kmsupx5.h
index ae997a71f6..7ee9a914a4 100644
--- a/include/configs/kmsupx5.h
+++ b/include/configs/kmsupx5.h
@@ -240,51 +240,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -389,14 +344,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
@@ -436,32 +383,4 @@
OR_GPCM_EHTR_CLEAR | \
OR_GPCM_EAD)
-/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-/* 512M should also include APP2... */
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#endif /* __CONFIG_H */
diff --git a/include/configs/kmtegr1.h b/include/configs/kmtegr1.h
index 2e4e2a3b5f..53017faa1c 100644
--- a/include/configs/kmtegr1.h
+++ b/include/configs/kmtegr1.h
@@ -244,51 +244,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -441,14 +396,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
/* must be after the include because KMBEC_FPGA is otherwise undefined */
#define CONFIG_SYS_NAND_BASE CONFIG_SYS_KMBEC_FPGA_BASE /* PRIO_BASE_ADDRESS */
@@ -483,21 +430,6 @@
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT5L (0)
-#define CONFIG_SYS_IBAT5U (0)
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
/* ethernet port connected to piggy (UEC2) */
#define CONFIG_HAS_ETH1
#define CONFIG_UEC_ETH2
diff --git a/include/configs/kmtepr2.h b/include/configs/kmtepr2.h
index f998b95f93..8f2be980a0 100644
--- a/include/configs/kmtepr2.h
+++ b/include/configs/kmtepr2.h
@@ -240,51 +240,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -389,14 +344,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
@@ -452,41 +399,4 @@
OR_GPCM_TRLX_CLEAR | \
OR_GPCM_EHTR_CLEAR)
-/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-/* 512M should also include APP2... */
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-/* APP2: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#endif /* __CONFIG_H */
diff --git a/include/configs/kmvect1.h b/include/configs/kmvect1.h
index f4da14a616..172a28e850 100644
--- a/include/configs/kmvect1.h
+++ b/include/configs/kmvect1.h
@@ -236,51 +236,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -433,14 +388,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
#define CONFIG_SYS_APP2_BASE 0xB0000000
@@ -489,25 +436,6 @@
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-/*
* QE UEC ethernet configuration
*/
#define CONFIG_MV88E6352_SWITCH
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index 2822aa3b9d..1bca11bd6e 100644
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -355,43 +355,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_8M | BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE | BATU_BL_8M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/*
* Environment Configuration
*/
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index d6f2813e50..8179147bc2 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -383,103 +383,10 @@
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* PCI @ 0x80000000 */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
#endif
-#ifdef CONFIG_MPC83XX_PCI2
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-#endif
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* LBC SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_LBC_SDRAM_BASE \
- | BATL_PP_RW \
- | BATL_MEMCOHERENCE \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_LBC_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif
diff --git a/include/configs/strider.h b/include/configs/strider.h
index ef33eaef9b..a716096bed 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -515,43 +515,6 @@ void fpga_control_clear(unsigned int bus, int pin);
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR, PCI IO and FPGA: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_8M | BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_FLASH_BASE | BATU_BL_8M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/*
* Environment Configuration
*/
diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h
index 4cc9f13d37..6a4006ef6a 100644
--- a/include/configs/suvd3.h
+++ b/include/configs/suvd3.h
@@ -237,51 +237,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -386,14 +341,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
#define CONFIG_SYS_APP2_BASE 0xB0000000
@@ -441,23 +388,4 @@
#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
-/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
#endif /* __CONFIG_H */
diff --git a/include/configs/tuge1.h b/include/configs/tuge1.h
index 8d254689cf..5bb74fd9ae 100644
--- a/include/configs/tuge1.h
+++ b/include/configs/tuge1.h
@@ -240,51 +240,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -389,14 +344,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
@@ -436,32 +383,4 @@
OR_GPCM_EHTR_CLEAR | \
OR_GPCM_EAD)
-/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-/* 512M should also include APP2... */
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-#define CONFIG_SYS_IBAT6L (0)
-#define CONFIG_SYS_IBAT6U (0)
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#endif /* __CONFIG_H */
diff --git a/include/configs/tuxx1.h b/include/configs/tuxx1.h
index 63fbf1b45c..49f77efa74 100644
--- a/include/configs/tuxx1.h
+++ b/include/configs/tuxx1.h
@@ -240,51 +240,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
/*
- * MMU Setup
- */
-
-/* DDR: cache cacheable */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-
-/* IMMRBAR & PCI IO: cache-inhibit and guarded */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_IMMR | BATU_BL_4M | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-
-/* PRIO1, PIGGY: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_KMBEC_FPGA_BASE | BATU_BL_128M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT2L (CONFIG_SYS_KMBEC_FPGA_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-
-/* FLASH: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_FLASH_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT3L (CONFIG_SYS_FLASH_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-
-/* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_INIT_RAM_ADDR | BATU_BL_128K | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-
-/*
* Internal Definitions
*/
#define BOOTFLASH_START 0xF0000000
@@ -389,14 +344,6 @@
#define CONFIG_SYS_LBC_LBCR 0x00000000
-/*
- * MMU Setup
- */
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
@@ -462,41 +409,4 @@
0x0000c000 | \
MxMR_WLFx_2X)
-/*
- * MMU Setup
- */
-/* APP1: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-/* 512M should also include APP2... */
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-
-/* APP2: icache cacheable, but dcache-inhibit and guarded */
-#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
- BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | \
- BATU_BL_256M | \
- BATU_VS | \
- BATU_VP)
-#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | \
- BATL_PP_RW | \
- BATL_CACHEINHIBIT | \
- BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#endif /* __CONFIG_H */
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index b15cd218f2..84d2c897d7 100644
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -333,76 +333,6 @@
#define CONFIG_SYS_HID2 HID2_HBE
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-#if defined(CONFIG_PCI)
-/* PCI @ 0x80000000 */
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
-#endif
-
-/* PCI2 not supported on 8313 */
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
-
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \
- | BATL_PP_RW \
- | BATL_CACHEINHIBIT \
- | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \
- | BATU_BL_256M \
- | BATU_VS \
- | BATU_VP)
-
-/* stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
-#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-/* FPGA, SRAM, NAND @ 0x60000000 */
-#define CONFIG_SYS_IBAT7L (0x60000000 | BATL_PP_RW | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT7U (0x60000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#define CONFIG_NETDEV eth0
#define CONFIG_HOSTNAME "ve8313"
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index d73265e064..249783720c 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -302,82 +302,10 @@
#define CONFIG_SYS_GPIO2_DIR 0x78900000
#define CONFIG_SYS_GPIO2_DAT 0x70100000
-/* DDR @ 0x00000000 */
-#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-
-/* PCI @ 0x80000000 */
#ifdef CONFIG_PCI
#define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT1L (0)
-#define CONFIG_SYS_IBAT1U (0)
-#define CONFIG_SYS_IBAT2L (0)
-#define CONFIG_SYS_IBAT2U (0)
-#endif
-
-#ifdef CONFIG_MPC83XX_PCI2
-#define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI2_MEM_BASE | BATL_PP_RW | \
- BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI2_MEM_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI2_MMIO_BASE | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI2_MMIO_BASE | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT3L (0)
-#define CONFIG_SYS_IBAT3U (0)
-#define CONFIG_SYS_IBAT4L (0)
-#define CONFIG_SYS_IBAT4U (0)
#endif
-/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 */
-#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_RW | \
- BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | \
- BATU_VS | BATU_VP)
-
-#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
-
-#if (CONFIG_SYS_DDR_SIZE == 512)
-#define CONFIG_SYS_IBAT7L (CONFIG_SYS_SDRAM_BASE+0x10000000 | \
- BATL_PP_RW | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT7U (CONFIG_SYS_SDRAM_BASE+0x10000000 | \
- BATU_BL_256M | BATU_VS | BATU_VP)
-#else
-#define CONFIG_SYS_IBAT7L (0)
-#define CONFIG_SYS_IBAT7U (0)
-#endif
-
-#define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
-#define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U
-#define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L
-#define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U
-#define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L
-#define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U
-#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
-#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
-#define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L
-#define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U
-#define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L
-#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
-#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
-#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
-#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
-#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#endif