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author | Kever Yang <kever.yang@rock-chips.com> | 2017-06-13 10:03:11 +0800 |
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committer | Philipp Tomsich <philipp.tomsich@theobroma-systems.com> | 2017-06-23 16:40:23 +0200 |
commit | 6a464d9cab63f5317bc914e2de52a4de98377743 (patch) | |
tree | deba93cf20a02a60c6a703b260d874eb3cc8f5cf /test/ut.c | |
parent | 915e09814a83128fee8b87b2ee2e5f4a17e04a01 (diff) | |
download | u-boot-6a464d9cab63f5317bc914e2de52a4de98377743.tar.gz u-boot-6a464d9cab63f5317bc914e2de52a4de98377743.tar.xz u-boot-6a464d9cab63f5317bc914e2de52a4de98377743.zip |
rockchip: clk: rk3036: correct setting for pll integer mode
According to rk3036 TRM, pll_con1[12] should be set to '1' for the pll
integer mode, while the '0' means the frac mode.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Diffstat (limited to 'test/ut.c')
0 files changed, 0 insertions, 0 deletions