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| author | Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> | 2017-01-30 12:06:02 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-11-28 16:09:09 +0100 |
| commit | f811eca9db05fc89fe52141b256231ff94859add (patch) | |
| tree | b5be64c6e74426bddbeb5ba48705dee42846f7b9 /scripts | |
| parent | d801ce553e84fded21060804f577b944da445317 (diff) | |
arm64: zynqmp: zcu102: Modifying GTR lane-0 to PCIe
- Enabling GTR lane-0 to PCIe
- Enabling PCIe node in device tree
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions