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| author | Patrice Chotard <patrice.chotard@st.com> | 2018-10-24 14:10:18 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-11-16 16:51:56 -0500 |
| commit | 8f651ca60ba1e574c2b836195ea882c01143922f (patch) | |
| tree | feb9d494eed4d15a942c06dcdef3fa39b8790212 /scripts | |
| parent | d5a8313905f54ebdf128ac428c3cf58a2ebcbda2 (diff) | |
| download | u-boot-8f651ca60ba1e574c2b836195ea882c01143922f.tar.gz u-boot-8f651ca60ba1e574c2b836195ea882c01143922f.tar.xz u-boot-8f651ca60ba1e574c2b836195ea882c01143922f.zip | |
pinctrl: stm32: Add get_pins_count() ops
Add get_pins_count ops to obtain the number of pins
owns by a pin-controller.
On STM32 SoCs bindings, each pin-controller owns
several gpio banks. Each GPIO bank can own up to 16 pins.
To obtain the total pins count, walk through each sub-nodes
(ie GPIO banks) and sum each GPIO banks pins number. For that
in probe() we build a list with each GPIO device reference found.
This list will also be used with future get_pin_muxing and get_pin_name
ops to speed up and optimize walk through all GPIO banks.
As this code is common to all STM32 SoCs, this code is put
under SPL_BUILD compilation flag to avoid to increase SPL code size
for STM32F7 which is limited to 32Ko.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions
