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authorTom Rini <trini@konsulko.com>2021-03-02 09:36:23 -0500
committerTom Rini <trini@konsulko.com>2021-03-02 09:36:23 -0500
commit20ecfbe93175e84dbf597d39a6ddeed29099dd73 (patch)
tree8effc4909688ab8f44754796c8f3b63a51a038a9 /scripts
parentc5219c4a18f2b27547ecd799914f94e48b0fa86f (diff)
downloadu-boot-20ecfbe93175e84dbf597d39a6ddeed29099dd73.tar.gz
u-boot-20ecfbe93175e84dbf597d39a6ddeed29099dd73.tar.xz
u-boot-20ecfbe93175e84dbf597d39a6ddeed29099dd73.zip
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'scripts')
-rw-r--r--scripts/config_whitelist.txt51
1 files changed, 0 insertions, 51 deletions
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index c8c87900ce..e98185c064 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -78,7 +78,6 @@ CONFIG_AT91_GPIO_PULLUP
CONFIG_AT91_LED
CONFIG_AT91_WANTS_COMMON_PHY
CONFIG_ATAPI
-CONFIG_ATM
CONFIG_ATMEL_LCD
CONFIG_ATMEL_LCD_BGR555
CONFIG_ATMEL_LCD_RGB565
@@ -615,8 +614,6 @@ CONFIG_HAS_ETH0
CONFIG_HAS_ETH1
CONFIG_HAS_ETH2
CONFIG_HAS_ETH3
-CONFIG_HAS_ETH5
-CONFIG_HAS_ETH7
CONFIG_HAS_FEC
CONFIG_HAS_FSL_DR_USB
CONFIG_HAS_FSL_MPH_USB
@@ -1276,7 +1273,6 @@ CONFIG_POST_WATCHDOG
CONFIG_POWER
CONFIG_POWER_FSL
CONFIG_POWER_FSL_MC13892
-CONFIG_POWER_FSL_MC34704
CONFIG_POWER_HI6553
CONFIG_POWER_I2C
CONFIG_POWER_LTC3676
@@ -1387,7 +1383,6 @@ CONFIG_RTC_DS1388
CONFIG_RTC_DS1388_TCR_VAL
CONFIG_RTC_DS3231
CONFIG_RTC_FTRTC010
-CONFIG_RTC_IMXDI
CONFIG_RTC_M41T11
CONFIG_RTC_MC13XXX
CONFIG_RTC_MCFRRTC
@@ -1696,7 +1691,6 @@ CONFIG_SYS_BAUDRATE_TABLE
CONFIG_SYS_BCSR
CONFIG_SYS_BCSR_ADDR
CONFIG_SYS_BCSR_BASE
-CONFIG_SYS_BCSR_BASE_PHYS
CONFIG_SYS_BCSR_SIZE
CONFIG_SYS_BD_REV
CONFIG_SYS_BFTIC3_BASE
@@ -1968,8 +1962,6 @@ CONFIG_SYS_DDRTC
CONFIG_SYS_DDRUA
CONFIG_SYS_DDR_BLOCK1_SIZE
CONFIG_SYS_DDR_BLOCK2_BASE
-CONFIG_SYS_DDR_CDR_1
-CONFIG_SYS_DDR_CDR_2
CONFIG_SYS_DDR_CFG_1A
CONFIG_SYS_DDR_CFG_1B
CONFIG_SYS_DDR_CFG_2
@@ -1986,7 +1978,6 @@ CONFIG_SYS_DDR_CONFIG
CONFIG_SYS_DDR_CONFIG_2
CONFIG_SYS_DDR_CONFIG_256
CONFIG_SYS_DDR_CONTROL
-CONFIG_SYS_DDR_CONTROL2
CONFIG_SYS_DDR_CONTROL_2
CONFIG_SYS_DDR_CPO
CONFIG_SYS_DDR_CS0_BNDS
@@ -2000,8 +1991,6 @@ CONFIG_SYS_DDR_CS2_CONFIG
CONFIG_SYS_DDR_CS3_BNDS
CONFIG_SYS_DDR_CS3_CONFIG
CONFIG_SYS_DDR_DATA_INIT
-CONFIG_SYS_DDR_ERR_DIS
-CONFIG_SYS_DDR_ERR_INT_EN
CONFIG_SYS_DDR_INIT_ADDR
CONFIG_SYS_DDR_INIT_EXT_ADDR
CONFIG_SYS_DDR_INTERVAL
@@ -2027,21 +2016,14 @@ CONFIG_SYS_DDR_MODE_2_900
CONFIG_SYS_DDR_MODE_CONTROL
CONFIG_SYS_DDR_MODE_CTL
CONFIG_SYS_DDR_MODE_WEAK
-CONFIG_SYS_DDR_OCD_CTRL
-CONFIG_SYS_DDR_OCD_STATUS
CONFIG_SYS_DDR_RAW_TIMING
CONFIG_SYS_DDR_RCW_1
CONFIG_SYS_DDR_RCW_2
-CONFIG_SYS_DDR_SBE
CONFIG_SYS_DDR_SDRAM_BASE
CONFIG_SYS_DDR_SDRAM_BASE2
CONFIG_SYS_DDR_SDRAM_CFG
CONFIG_SYS_DDR_SDRAM_CFG2
-CONFIG_SYS_DDR_SDRAM_CFG_2
CONFIG_SYS_DDR_SDRAM_CLK_CNTL
-CONFIG_SYS_DDR_SDRAM_INTERVAL
-CONFIG_SYS_DDR_SDRAM_MODE
-CONFIG_SYS_DDR_SDRAM_MODE_2
CONFIG_SYS_DDR_SIZE
CONFIG_SYS_DDR_SR_CNTR
CONFIG_SYS_DDR_TIMING_0
@@ -2818,7 +2800,6 @@ CONFIG_SYS_LBC0_BASE
CONFIG_SYS_LBC0_BASE_PHYS
CONFIG_SYS_LBC1_BASE
CONFIG_SYS_LBC1_BASE_PHYS
-CONFIG_SYS_LBCR_ADDR
CONFIG_SYS_LBC_ADDR
CONFIG_SYS_LBC_CACHE_BASE
CONFIG_SYS_LBC_FLASH_BASE
@@ -2894,8 +2875,6 @@ CONFIG_SYS_MAX_MTD_BANKS
CONFIG_SYS_MAX_NAND_CHIPS
CONFIG_SYS_MAX_NAND_DEVICE
CONFIG_SYS_MAX_PCI_EPS
-CONFIG_SYS_MB862xx_CCF
-CONFIG_SYS_MB862xx_MMR
CONFIG_SYS_MBAR
CONFIG_SYS_MBAR2
CONFIG_SYS_MCATT0_VAL
@@ -3099,7 +3078,6 @@ CONFIG_SYS_NAND_REGS_BASE
CONFIG_SYS_NAND_SELECT_DEVICE
CONFIG_SYS_NAND_SIZE
CONFIG_SYS_NAND_SPL_KERNEL_OFFS
-CONFIG_SYS_NAND_SPL_SIZE
CONFIG_SYS_NAND_U_BOOT_DST
CONFIG_SYS_NAND_U_BOOT_RELOC
CONFIG_SYS_NAND_U_BOOT_RELOC_SP
@@ -3700,8 +3678,6 @@ CONFIG_SYS_UART_PORT
CONFIG_SYS_UBOOT_BASE
CONFIG_SYS_UBOOT_END
CONFIG_SYS_UBOOT_START
-CONFIG_SYS_UCC_RGMII_MODE
-CONFIG_SYS_UCC_RMII_MODE
CONFIG_SYS_UDELAY_BASE
CONFIG_SYS_UEC
CONFIG_SYS_UEC1_ETH_TYPE
@@ -3718,34 +3694,8 @@ CONFIG_SYS_UEC2_PHY_ADDR
CONFIG_SYS_UEC2_RX_CLK
CONFIG_SYS_UEC2_TX_CLK
CONFIG_SYS_UEC2_UCC_NUM
-CONFIG_SYS_UEC3_ETH_TYPE
-CONFIG_SYS_UEC3_INTERFACE_SPEED
-CONFIG_SYS_UEC3_INTERFACE_TYPE
CONFIG_SYS_UEC3_PHY_ADDR
-CONFIG_SYS_UEC3_RX_CLK
-CONFIG_SYS_UEC3_TX_CLK
-CONFIG_SYS_UEC3_UCC_NUM
-CONFIG_SYS_UEC4_ETH_TYPE
-CONFIG_SYS_UEC4_INTERFACE_SPEED
-CONFIG_SYS_UEC4_INTERFACE_TYPE
CONFIG_SYS_UEC4_PHY_ADDR
-CONFIG_SYS_UEC4_RX_CLK
-CONFIG_SYS_UEC4_TX_CLK
-CONFIG_SYS_UEC4_UCC_NUM
-CONFIG_SYS_UEC6_ETH_TYPE
-CONFIG_SYS_UEC6_INTERFACE_SPEED
-CONFIG_SYS_UEC6_INTERFACE_TYPE
-CONFIG_SYS_UEC6_PHY_ADDR
-CONFIG_SYS_UEC6_RX_CLK
-CONFIG_SYS_UEC6_TX_CLK
-CONFIG_SYS_UEC6_UCC_NUM
-CONFIG_SYS_UEC8_ETH_TYPE
-CONFIG_SYS_UEC8_INTERFACE_SPEED
-CONFIG_SYS_UEC8_INTERFACE_TYPE
-CONFIG_SYS_UEC8_PHY_ADDR
-CONFIG_SYS_UEC8_RX_CLK
-CONFIG_SYS_UEC8_TX_CLK
-CONFIG_SYS_UEC8_UCC_NUM
CONFIG_SYS_UECx_PHY_ADDR
CONFIG_SYS_UHC0_EHCI_BASE
CONFIG_SYS_UHC1_EHCI_BASE
@@ -3931,7 +3881,6 @@ CONFIG_USB_BOOTING
CONFIG_USB_DEVICE
CONFIG_USB_DEV_BASE
CONFIG_USB_DEV_PULLUP_GPIO
-CONFIG_USB_DWC2_REG_ADDR
CONFIG_USB_EHCI_ARMADA100
CONFIG_USB_EHCI_BASE
CONFIG_USB_EHCI_BASE_LIST