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| author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2018-03-06 17:37:09 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2018-04-09 12:14:50 +0200 |
| commit | 71723aaec5e6dbfbc401d65461fe1cae98912e79 (patch) | |
| tree | bd611c326ef1106c1dd17f059933d7e7d93a4350 /scripts/const_structs.checkpatch | |
| parent | 31bcb3444cbd5002ca9d8f6a3a2644092748cdba (diff) | |
| download | u-boot-71723aaec5e6dbfbc401d65461fe1cae98912e79.tar.gz u-boot-71723aaec5e6dbfbc401d65461fe1cae98912e79.tar.xz u-boot-71723aaec5e6dbfbc401d65461fe1cae98912e79.zip | |
fpga: zynq: Add delay after PCFG_PROG_B change
There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'scripts/const_structs.checkpatch')
0 files changed, 0 insertions, 0 deletions