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| author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2019-10-23 10:46:44 +0000 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-12-09 09:47:42 -0600 |
| commit | b2f2643b393e6aff522dd7f608411a695ea9d67f (patch) | |
| tree | ee365aa039512c14cfe876c80492d00954c53dbd /scripts/checkstack.pl | |
| parent | 19820db0bd97fd4e202019594abe9a9604aa5534 (diff) | |
| download | u-boot-b2f2643b393e6aff522dd7f608411a695ea9d67f.tar.gz u-boot-b2f2643b393e6aff522dd7f608411a695ea9d67f.tar.xz u-boot-b2f2643b393e6aff522dd7f608411a695ea9d67f.zip | |
net: phy: micrel: make sure the factory test bit is cleared
The KSZ8081 PHY has a factory test mode which is set at the de-assertion
of the reset line based on the RXER (KSZ8081RNA/RND) or TXC
(KSZ8081MNX/RNB) pin. If a pull-down is missing, or if the pin has a
pull-up, the factory test mode should be cleared by manually writing a 0
(according to the datasheet).
Create another ksz8081_config function to handle this case.
Suggested-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'scripts/checkstack.pl')
0 files changed, 0 insertions, 0 deletions