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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-01-16 13:19:44 +0800 |
|---|---|---|
| committer | Peng Fan <peng.fan@nxp.com> | 2020-01-16 13:19:44 +0800 |
| commit | 181c65b814b29a9e12f5fd034e259c891f3bbb64 (patch) | |
| tree | 73fec4abcb3fea2b74a42cf6dad80c44235b23c9 /scripts/checkpatch.pl | |
| parent | ac76dd0836468445e1ba4d756617d677ed58f59b (diff) | |
| download | u-boot-181c65b814b29a9e12f5fd034e259c891f3bbb64.tar.gz u-boot-181c65b814b29a9e12f5fd034e259c891f3bbb64.tar.xz u-boot-181c65b814b29a9e12f5fd034e259c891f3bbb64.zip | |
configs: ls1028a: use default SDHC clock divider value
The SDHC clock divider value for LS1028A should be default 2,
not 1.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'scripts/checkpatch.pl')
0 files changed, 0 insertions, 0 deletions