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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-01-30 13:07:02 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2019-02-09 07:50:56 -0500 |
| commit | 63201281e5e51116676bf3a2b028035856d3f2a6 (patch) | |
| tree | 3376e1ec3f3a837c4395be0c4acccb5053b88ef9 /scripts/Lindent | |
| parent | d661f61847696dc5ac54b397908f886bd3583484 (diff) | |
| download | u-boot-63201281e5e51116676bf3a2b028035856d3f2a6.tar.gz u-boot-63201281e5e51116676bf3a2b028035856d3f2a6.tar.xz u-boot-63201281e5e51116676bf3a2b028035856d3f2a6.zip | |
clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR
Remove unnecessary setbits on set/clear registers.
Avoid to deactivate HSI with HSE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'scripts/Lindent')
0 files changed, 0 insertions, 0 deletions