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authorwdenk <wdenk>2003-07-14 22:13:32 +0000
committerwdenk <wdenk>2003-07-14 22:13:32 +0000
commit8564acf936726c5568d71e4fa93a0ae9814e0d07 (patch)
tree05fa981555adf1d333970f3d52d0683008fe3cfb /lib_ppc
parent5702923e23238df6c6f62d53f73863462ae62f4e (diff)
downloadu-boot-8564acf936726c5568d71e4fa93a0ae9814e0d07.tar.gz
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* Patches by Yuli Barcohen, 13 Jul 2003:
- Correct flash and JFFS2 support for MPC8260ADS - fix PVR values and clock generation for PowerQUICC II family (8270/8275/8280) * Patch by Bernhard Kuhn, 08 Jul 2003: - add support for M68K targets * Patch by Ken Chou, 3 Jul: - Fix PCI config table for A3000 - Fix iobase for natsemi.c (PCI_BASE_ADDRESS_0 is the IO base register for DP83815) * Allow to enable "slow" POST routines by key press on power-on * Fix temperature dependend switching of LCD backlight on LWMON * Tweak output format for LWMON
Diffstat (limited to 'lib_ppc')
-rw-r--r--lib_ppc/board.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index daa2a6df44..108244e296 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -526,7 +526,10 @@ void board_init_f (ulong bootflag)
#ifdef CONFIG_POST
post_bootmode_init();
- post_run (NULL, POST_ROM | post_bootmode_get(0));
+ if (post_hotkeys_pressed(gd)) /* Force the long-running tests (memory) */
+ post_run (NULL, POST_ROM | POST_SLOWTEST);
+ else
+ post_run (NULL, POST_ROM | post_bootmode_get(0));
#endif
WATCHDOG_RESET();
@@ -897,8 +900,11 @@ void board_init_r (gd_t *id, ulong dest_addr)
#endif
#ifdef CONFIG_POST
- post_run (NULL, POST_RAM | post_bootmode_get(0));
- if (post_bootmode_get(0) & POST_POWERFAIL) {
+ if (gd->post_hotkeys_latch)
+ post_run (NULL, POST_RAM | POST_SLOWTEST);
+ else
+ post_run (NULL, POST_RAM | post_bootmode_get(0));
+ if (post_bootmode_get(0) & POST_SLOWTEST) {
post_bootmode_clear();
board_poweroff();
}