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| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-11-22 02:38:13 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-11-29 00:28:57 +0900 |
| commit | 19d30ded88fb8b89c8426e6d95ded19ba900f314 (patch) | |
| tree | 445b3c50e376b0b10d6a0248e901581e029c68c0 /include | |
| parent | 4c61f79b5e5bf5a0dec7cac279d736d2c282d127 (diff) | |
| download | u-boot-19d30ded88fb8b89c8426e6d95ded19ba900f314.tar.gz u-boot-19d30ded88fb8b89c8426e6d95ded19ba900f314.tar.xz u-boot-19d30ded88fb8b89c8426e6d95ded19ba900f314.zip | |
mtd: nand: Add an option to maximize the ECC strength
The generic NAND DT bindings allows one to tweak the ECC strength and
step size to their need. It can be used to lower the ECC strength to
match a bootloader/firmware config, but might also be used to get a better
reliability.
In the latter case, the user might want to use the maximum ECC strength
without having to explicitly calculate the exact value (this value not
only depends on the OOB size, but also on the NAND controller, and can
be tricky to extract).
Add a generic 'nand-ecc-maximize' DT property and the associated
NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best
ECC strength and step-size on their own.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
[Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82]
[masahiro: of_property_read_bool -> fdt_getprop for U-Boot]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mtd/nand.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index cba65634e6..eebfb13f7f 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -153,6 +153,7 @@ typedef enum { * pages and you want to rely on the default implementation. */ #define NAND_ECC_GENERIC_ERASED_CHECK BIT(0) +#define NAND_ECC_MAXIMIZE BIT(1) /* Bit mask for flags passed to do_nand_read_ecc */ #define NAND_GET_DEVICE 0x80 |