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| author | Fabien Parent <fparent@baylibre.com> | 2019-10-17 21:02:05 +0200 |
|---|---|---|
| committer | Lukasz Majewski <lukma@denx.de> | 2020-01-26 12:03:06 +0100 |
| commit | 832685f07c75388e4f268d15536c988cc345b5a1 (patch) | |
| tree | cd9456cfdb7c0bc6bdfed5d016a8ce84502afae2 /include/pxa_lcd.h | |
| parent | 40521a6c90d4adfb7f3041033c8cbbeff087a5ca (diff) | |
| download | u-boot-832685f07c75388e4f268d15536c988cc345b5a1.tar.gz u-boot-832685f07c75388e4f268d15536c988cc345b5a1.tar.xz u-boot-832685f07c75388e4f268d15536c988cc345b5a1.zip | |
clk: mediatek: use unsigned type for returning the clk rate
mtk_clk_find_parent_rate is calling clk_get_rate to know the rate
of a parent clock. clk_get_rate returns a ulong, while
mtk_clk_find_parent_rate returns an int. This implicit cast creates
an issue for clock rates big enough to need the full 32 bits to
store its data. When that happen the clk rate will become incorrect
because of the implicit cast between ulong -> int -> ulong.
This commit change the return type of mtk_clk_find_parent_rate to
ulong.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Diffstat (limited to 'include/pxa_lcd.h')
0 files changed, 0 insertions, 0 deletions