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| author | Brad Kim <brad.kim@semifive.com> | 2020-11-13 20:47:51 +0900 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2020-12-14 15:16:34 +0800 |
| commit | fb33eaa3a26cdc37826390b6db223509230ae8e2 (patch) | |
| tree | b25433aa4126fdba6a61ab50d6afcccdcb60a582 /include/linux | |
| parent | 5a1a8a63be8f7262a300eddafb18020926b12fb6 (diff) | |
| download | u-boot-fb33eaa3a26cdc37826390b6db223509230ae8e2.tar.gz u-boot-fb33eaa3a26cdc37826390b6db223509230ae8e2.tar.xz u-boot-fb33eaa3a26cdc37826390b6db223509230ae8e2.zip | |
riscv: fix the wrong swap value register
Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value
Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions