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| author | Yinbo Zhu <yinbo.zhu@nxp.com> | 2019-07-16 15:09:07 +0800 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2019-09-12 14:02:10 +0530 |
| commit | 29009a507c9145e51620b5d289808b0f413af5fe (patch) | |
| tree | bc9d40315539ac74718233c01e2d8376515e7cef /include/linux | |
| parent | 24cb6f2295ca4859de257d2922701bff6ca6f49b (diff) | |
| download | u-boot-29009a507c9145e51620b5d289808b0f413af5fe.tar.gz u-boot-29009a507c9145e51620b5d289808b0f413af5fe.tar.xz u-boot-29009a507c9145e51620b5d289808b0f413af5fe.zip | |
mmc: Kconfig: Add FSL_ESDHC_USE_PERIPHERAL_CLK option
NXP fsl_esdhc controller supports two reference clocks:
platform clock and peripheral clock
Peripheral clock can provide higher clock frequency
which is required to be used for tuning of SD UHS mode
and eMMC HS200/HS400 modes.
Peripheral clock is enabled by default by defining config
option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes
are supported.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions