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| author | Aswath Govindraju <a-govindraju@ti.com> | 2020-11-20 21:18:53 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-01-12 10:21:40 +0530 |
| commit | 6f9d41403a054cf2ce5cd7484a72ee81eeaac34a (patch) | |
| tree | 39bc236a7d34ba77f6054ddb0a78d8405d7656a8 /include/linux/err.h | |
| parent | d71be1990218957b9f05dbf13a72859a2abe06d7 (diff) | |
| download | u-boot-6f9d41403a054cf2ce5cd7484a72ee81eeaac34a.tar.gz u-boot-6f9d41403a054cf2ce5cd7484a72ee81eeaac34a.tar.xz u-boot-6f9d41403a054cf2ce5cd7484a72ee81eeaac34a.zip | |
board: ti: am65x: Set SERDES0 mux to PCIe to use USB 2.0 interface
It has been observed that setting SERDES0 lane mux to USB prevents USB 2.0
operation on USB0. Setting SERDES0 lane mux to non-USB when USB0 is used in
USB 2.0 only mode solves this issue. However, for USB3.0+2.0 operation this
issue is not present.
Implement this workaround by writing 1 to LANE_FUNC_SEL field in
CTRLMMR_SERDES0_CTRL register.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Diffstat (limited to 'include/linux/err.h')
0 files changed, 0 insertions, 0 deletions