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authorWolfgang Denk <wd@denx.de>2010-05-21 22:22:23 +0200
committerWolfgang Denk <wd@denx.de>2010-05-21 22:22:23 +0200
commit8a452c2c17bc284e3f91b8ed4aec9d2b9b342df7 (patch)
tree95d411f913fa4634df6ba86ce7af4bbbe98a92c0 /include/configs
parent445093d175b06226549680b6894923bb0f5e50fa (diff)
parent03af5abd85637d27e96fb999ce6e3992293570b0 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-imx
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/imx31_litekit.h19
-rw-r--r--include/configs/mx31ads.h8
-rw-r--r--include/configs/mx31pdk.h9
-rw-r--r--include/configs/mx51evk.h15
-rw-r--r--include/configs/qong.h16
5 files changed, 56 insertions, 11 deletions
diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h
index 61310089b7..49048563cb 100644
--- a/include/configs/imx31_litekit.h
+++ b/include/configs/imx31_litekit.h
@@ -68,10 +68,13 @@
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS 1
+#define CONFIG_FSL_PMIC_CS 0
+#define CONFIG_FSL_PMIC_CLK 1000000
+#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+
#define CONFIG_RTC_MC13783 1
-/* MC13783 connected to CSPI2 and SS0 */
-#define CONFIG_MC13783_SPI_BUS 1
-#define CONFIG_MC13783_SPI_CS 0
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
@@ -89,6 +92,7 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_SPI
#define CONFIG_CMD_DATE
+#define CONFIG_CMD_NAND
#define CONFIG_BOOTDELAY 3
@@ -174,4 +178,13 @@
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_JFFS2_DEV "nor0"
+/*
+ * NAND flash
+ */
+#define CONFIG_NAND_MXC
+#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
+#define CONFIG_MXC_NAND_HWECC
+
#endif /* __CONFIG_H */
diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h
index ec1c905403..dedecd7fb6 100644
--- a/include/configs/mx31ads.h
+++ b/include/configs/mx31ads.h
@@ -65,10 +65,12 @@
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS 1
+#define CONFIG_FSL_PMIC_CS 0
+#define CONFIG_FSL_PMIC_CLK 1000000
+#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
#define CONFIG_RTC_MC13783 1
-/* MC13783 connected to CSPI2 and SS0 */
-#define CONFIG_MC13783_SPI_BUS 1
-#define CONFIG_MC13783_SPI_CS 0
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index bee2f45a15..0414cc37a7 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -69,12 +69,13 @@
#define CONFIG_DEFAULT_SPI_BUS 1
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS 1
+#define CONFIG_FSL_PMIC_CS 2
+#define CONFIG_FSL_PMIC_CLK 1000000
+#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
#define CONFIG_RTC_MC13783 1
-/* MC13783 connected to CSPI2 and SS2 */
-#define CONFIG_MC13783_SPI_BUS 1
-#define CONFIG_MC13783_SPI_CS 2
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 3626df73df..86a4731a69 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -54,6 +54,8 @@
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE 128
+#define BOARD_LATE_INIT
+
/*
* Hardware drivers
*/
@@ -61,6 +63,19 @@
#define CONFIG_SYS_MX51_UART1
/*
+ * SPI Configs
+ * */
+#define CONFIG_CMD_SPI
+
+#define CONFIG_MXC_SPI
+
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS 0
+#define CONFIG_FSL_PMIC_CS 0
+#define CONFIG_FSL_PMIC_CLK 2500000
+#define CONFIG_FSL_PMIC_MODE (SPI_CPOL | SPI_CS_HIGH)
+
+/*
* MMC Configs
* */
#define CONFIG_FSL_ESDHC
diff --git a/include/configs/qong.h b/include/configs/qong.h
index 1d63b33b9b..100fa3f8ac 100644
--- a/include/configs/qong.h
+++ b/include/configs/qong.h
@@ -54,6 +54,17 @@
#define CONFIG_MX31_GPIO
+#define CONFIG_MXC_SPI
+#define CONFIG_DEFAULT_SPI_BUS 1
+#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+#define CONFIG_RTC_MC13783
+
+#define CONFIG_FSL_PMIC
+#define CONFIG_FSL_PMIC_BUS 1
+#define CONFIG_FSL_PMIC_CS 0
+#define CONFIG_FSL_PMIC_CLK 100000
+#define CONFIG_FSL_PMIC_MODE (SPI_MODE_2 | SPI_CS_HIGH)
+
/* FPGA */
#define CONFIG_QONG_FPGA 1
#define CONFIG_FPGA_BASE (CS1_BASE)
@@ -73,7 +84,7 @@
#define CONFIG_SPLASH_SCREEN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
-#define CONFIG_DISPLAY_VBEST_VGG322403
+#define CONFIG_DISPLAY_COM57H5M10XRC
/*
* Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
@@ -98,6 +109,9 @@
#define CONFIG_CMD_NET
#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_DATE
+#define BOARD_LATE_INIT
/*
* You can compile in a MAC address and your custom net settings by using