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author | Andre Przywara <andre.przywara@arm.com> | 2021-04-12 01:04:51 +0100 |
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committer | Tom Rini <trini@konsulko.com> | 2021-04-20 07:31:12 -0400 |
commit | 109552d773e7aeb0f6417d8245fb0ecf01599ef3 (patch) | |
tree | 010a7fe67a4d74cd576341a854ff299d449c890a /include/configs | |
parent | 84b2cd74f370dabb707e2611bf57714a66d08622 (diff) | |
download | u-boot-109552d773e7aeb0f6417d8245fb0ecf01599ef3.tar.gz u-boot-109552d773e7aeb0f6417d8245fb0ecf01599ef3.tar.xz u-boot-109552d773e7aeb0f6417d8245fb0ecf01599ef3.zip |
arm: highbank: Enable OF_CONTROL
All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:
Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/highbank.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 5e3cc3a1db..7f37c81fc9 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -18,7 +18,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) #define CONFIG_PL011_CLOCK 150000000 -#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ |