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author | Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> | 2017-09-19 23:18:07 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2017-10-06 11:28:16 -0400 |
commit | 32f11829266f2ede9afac051f980d4ae9b52f963 (patch) | |
tree | c04cf39d1440814c1018564292a52c1eaf78be77 /include/configs/qemu-arm.h | |
parent | 3675cb044e68bc1145444f3c4f9af5c02864607b (diff) | |
download | u-boot-32f11829266f2ede9afac051f980d4ae9b52f963.tar.gz u-boot-32f11829266f2ede9afac051f980d4ae9b52f963.tar.xz u-boot-32f11829266f2ede9afac051f980d4ae9b52f963.zip |
ARM: Add a new arch + board for QEMU's 'virt' machine
This board builds an U-Boot binary that is bootable with QEMU's 'virt'
machine on ARM. The minimal QEMU command line is:
qemu-system-arm -machine virt,highmem=off -bios u-boot.bin
(Note that the 'highmem=off' parameter to the 'virt' machine is required for
PCI to work in U-Boot.) This command line enables the following:
- u-boot.bin loaded and executing in the emulated flash at address 0x0
- A generated device tree blob placed at the start of RAM
- A freely configurable amount of RAM, described by the DTB
- A PL011 serial port, discoverable via the DTB
- An ARMv7 architected timer
- PSCI for rebooting the system
- A generic ECAM-based PCI host controller, discoverable via the DTB
Additionally, QEMU allows plugging a bunch of useful peripherals to the PCI bus.
The following ones are supported by both U-Boot and Linux:
- To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.:
-drive if=none,file=disk.img,id=mydisk -device ich9-ahci,id=ahci -device ide-drive,drive=mydisk,bus=ahci.0
- To add an Intel E1000 network adapter, pass e.g.:
-net nic,model=e1000 -net user
- To add an EHCI-compliant USB host controller, pass e.g.:
-device usb-ehci,id=ehci
- To add a NVMe disk, pass e.g.:
-drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Diffstat (limited to 'include/configs/qemu-arm.h')
-rw-r--r-- | include/configs/qemu-arm.h | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h new file mode 100644 index 0000000000..4376a24787 --- /dev/null +++ b/include/configs/qemu-arm.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2017 Tuomas Tynkkynen + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <linux/sizes.h> + +/* Physical memory map */ +#define CONFIG_SYS_TEXT_BASE 0x00000000 + +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0x40000000 + +/* The DTB generated by QEMU is placed at start of RAM, stay away from there */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M) +#define CONFIG_SYS_MALLOC_LEN SZ_16M + +/* QEMU's PL011 serial port is detected via FDT using the device model */ +#define CONFIG_PL01X_SERIAL + +/* QEMU implements a 62.5MHz architected timer */ +/* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */ +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ 1000 +#define CONFIG_SYS_HZ_CLOCK 62500000 + +/* For block devices, QEMU emulates an ICH9 AHCI controller over PCI */ +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 6 +#define CONFIG_SCSI_AHCI +#define CONFIG_LIBATA + +/* Environment options */ +#define CONFIG_ENV_SIZE SZ_64K + +#include <config_distro_defaults.h> + +#define BOOT_TARGET_DEVICES(func) \ + func(SCSI, scsi, 0) + +#include <config_distro_bootcmd.h> + +#define CONFIG_PREBOOT "pci enum" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_addr=0x40000000\0" \ + "scriptaddr=0x40200000\0" \ + "pxefile_addr_r=0x40300000\0" \ + "kernel_addr_r=0x40400000\0" \ + "ramdisk_addr_r=0x44000000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ |