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author | Wolfgang Denk <wd@pollux.(none)> | 2005-09-26 01:26:56 +0200 |
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committer | Wolfgang Denk <wd@pollux.(none)> | 2005-09-26 01:26:56 +0200 |
commit | d8e7e0f0442f6af9e925dfa33bb6a30b513aa329 (patch) | |
tree | bad589bc4a43f88a5d1388c7f3a38eba9a56bca3 /include/configs/mp2usb.h | |
parent | 98404649c82b1069ee95a5d455556092bc0ea901 (diff) | |
download | u-boot-d8e7e0f0442f6af9e925dfa33bb6a30b513aa329.tar.gz u-boot-d8e7e0f0442f6af9e925dfa33bb6a30b513aa329.tar.xz u-boot-d8e7e0f0442f6af9e925dfa33bb6a30b513aa329.zip |
Add support for AT91RM9200 OHCI Controller.
Patch by Eric Benard, 07 Apr 2005
Diffstat (limited to 'include/configs/mp2usb.h')
-rw-r--r-- | include/configs/mp2usb.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 005e91298b..04f1f24080 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -59,7 +59,7 @@ /* clocks */ #define PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */ -#define PLLBR_VAL 0x10483E0E /* 48 MHz (divider by 2 for USB) */ +#define PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */ #define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */ /* sdram */ @@ -101,6 +101,12 @@ #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ +#define CONFIG_USB_OHCI 1 +#define CONFIG_USB_KEYBOARD 1 +#define CONFIG_USB_STORAGE 1 +#define CONFIG_DOS_PARTITION 1 +#define CONFIG_AT91C_PQFP_UHPBUG 1 + #undef CONFIG_HARD_I2C #ifdef CONFIG_HARD_I2C @@ -133,6 +139,7 @@ CFG_CMD_DHCP | \ CFG_CMD_NFS | \ CFG_CMD_SNTP | \ + CFG_CMD_USB | \ CFG_CMD_CACHE) & \ ~(CFG_CMD_BDI | \ CFG_CMD_IMI | \ @@ -184,6 +191,9 @@ #define CFG_MAXARGS 32 /* max number of command args */ #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ +#define CFG_DEVICE_DEREGISTER /* needs device_deregister */ +#define LITTLEENDIAN 1 /* used by usb_ohci.c */ + #ifndef __ASSEMBLY__ /*----------------------------------------------------------------------- * Board specific extension for bd_info |