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| author | Michael Walle <michael@walle.cc> | 2020-06-01 21:53:26 +0200 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-07-27 14:16:27 +0530 |
| commit | 3d3fe8b12d1973b207ee0406709ff521eec83bf7 (patch) | |
| tree | 99569fc01e92f224208a4563132a762b1957929f /include/configs/ls1046a_common.h | |
| parent | ae846a6119dda1553177ff65dad22c2a0494d9fa (diff) | |
| download | u-boot-3d3fe8b12d1973b207ee0406709ff521eec83bf7.tar.gz u-boot-3d3fe8b12d1973b207ee0406709ff521eec83bf7.tar.xz u-boot-3d3fe8b12d1973b207ee0406709ff521eec83bf7.zip | |
armv8: layerscape: properly use CPU_RELEASE_ADDR
The generic armv8 code already has support to bring up the secondary
cores. Thus, don't hardcode the jump in the layerscape lowlevel_init to
the spin table code; instead just return early and let the common armv8
code handle the jump. This way we can actually use the CPU_RELEASE_ADDR
feature.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased, Removed kontron_sl28.h change as file does not exist]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'include/configs/ls1046a_common.h')
| -rw-r--r-- | include/configs/ls1046a_common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 8fe6937dfb..5899e32c21 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -48,7 +48,7 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL -#define CPU_RELEASE_ADDR secondary_boot_func +#define CPU_RELEASE_ADDR secondary_boot_addr /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 25000000 /* 25MHz */ |