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| author | Masahiro Yamada <yamada.m@jp.panasonic.com> | 2014-02-04 17:24:24 +0900 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-02-19 11:07:50 -0500 |
| commit | 9e4140329ee9a787d0f96ac2829d618d47f7973f (patch) | |
| tree | 6a40432f6f6723ba9ac5309076af17aec3bc0a9b /dts | |
| parent | d958002589cb724907e8d4360d546403d1e6b7d8 (diff) | |
| download | u-boot-9e4140329ee9a787d0f96ac2829d618d47f7973f.tar.gz u-boot-9e4140329ee9a787d0f96ac2829d618d47f7973f.tar.xz u-boot-9e4140329ee9a787d0f96ac2829d618d47f7973f.zip | |
kbuild: change out-of-tree build
This commit changes the working directory
where the build process occurs.
Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.
That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
$(obj)u-boot.bin: $(obj)u-boot
Here, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.
And our old build system changes the current working directory
with "make -C <sub-dir>" syntax when descending into the
sub-directories.
On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.
The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.
Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>"
syntax for descending into sub-directories.
(We can write it like "make $(obj)=<sub-dir>" with a shorthand.)
This means the current working directory is always the top
of the output directory.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
Diffstat (limited to 'dts')
| -rw-r--r-- | dts/Makefile | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/dts/Makefile b/dts/Makefile index 6c7198f65f..d81f32d914 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -26,7 +26,7 @@ DTC_FLAGS := -R 4 -p 0x1000 \ # Use a constant name for this so we can access it from C code. # objcopy doesn't seem to allow us to set the symbol name independently of # the filename. -DT_BIN := $(obj)dt.dtb +DT_BIN := $(obj)/dt.dtb $(DT_BIN): $(TOPDIR)/board/$(VENDOR)/dts/$(DEVICE_TREE).dts $(CPP) $(DTS_CPPFLAGS) $< -o $(DT_BIN).dts.tmp @@ -38,7 +38,7 @@ process_lds = \ # Run the compiler and get the link script from the linker GET_LDS = $(CC) $(CFLAGS) $(LDFLAGS) -Wl,--verbose 2>&1 -$(obj)dt.o: $(DT_BIN) +$(obj)/dt.o: $(DT_BIN) # We want the output format and arch. # We also hope to win a prize for ugliest Makefile / shell interaction # We look in the LDSCRIPT first. @@ -62,7 +62,7 @@ $(obj)dt.o: $(DT_BIN) \ cd $(dir ${DT_BIN}) && \ $(OBJCOPY) -I binary -O $${oformat} -B $${oarch} \ - $(notdir ${DT_BIN}) $@ + $(notdir ${DT_BIN}) $(notdir $@) rm $(DT_BIN) obj-$(CONFIG_OF_EMBED) := dt.o |