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| author | Sean Anderson <seanga2@gmail.com> | 2021-04-08 22:13:05 -0400 |
|---|---|---|
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2021-05-14 16:20:47 +0800 |
| commit | 598a06dcb47db8101a19d26c0d65572fbe8e71f6 (patch) | |
| tree | e2349affcf48fe8f903f7703506551963ea7de9a /drivers | |
| parent | d0686a02b98ee264532c25108edc3ba44acc1145 (diff) | |
| download | u-boot-598a06dcb47db8101a19d26c0d65572fbe8e71f6.tar.gz u-boot-598a06dcb47db8101a19d26c0d65572fbe8e71f6.tar.xz u-boot-598a06dcb47db8101a19d26c0d65572fbe8e71f6.zip | |
clk: k210: Fix PLL enable always getting taken
This conditional always evaluated as false, regardless of the value of reg.
Fix it so that it properly tests the bits in the PLL register. Also test
PLL_EN, now that we set it.
Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com>
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/kendryte/pll.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/kendryte/pll.c b/drivers/clk/kendryte/pll.c index f198920113..d46fd0ebbf 100644 --- a/drivers/clk/kendryte/pll.c +++ b/drivers/clk/kendryte/pll.c @@ -512,7 +512,8 @@ static int k210_pll_enable(struct clk *clk) struct k210_pll *pll = to_k210_pll(clk); u32 reg = readl(pll->reg); - if ((reg | K210_PLL_PWRD) && !(reg | K210_PLL_RESET)) + if ((reg & K210_PLL_PWRD) && (reg & K210_PLL_EN) && + !(reg & K210_PLL_RESET)) return 0; reg |= K210_PLL_PWRD; |