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authorDave Liu <r63238@freescale.com>2007-09-18 12:37:57 +0800
committerKim Phillips <kim.phillips@freescale.com>2008-01-08 09:55:39 -0600
commit19580e660cc8da49f16536a8bd78c047c7bc12e5 (patch)
tree2b0d1681d4b61b0d7bbf5cf886d25fc3d2753ddc /drivers
parent555da61702771fe0f76f3de23b4e7590f3704161 (diff)
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mpc83xx: Add the support of MPC837xEMDS board
The MPC837xEMDS board support: * DDR2 400MHz hardcoded and SPD init * Local bus NOR Flash * I2C, UART, MII and RTC * eTSEC RGMII * PCI host Signed-off-by: Dave Liu <daveliu@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tsec.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index ca6284b726..108cebd879 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -674,6 +674,15 @@ uint mii_cis8204_setmode(uint mii_reg, struct tsec_private * priv)
return MIIM_CIS8204_EPHYCON_INIT;
}
+uint mii_m88e1111s_setmode(uint mii_reg, struct tsec_private *priv)
+{
+ uint mii_data = read_phy_reg(priv, mii_reg);
+
+ if (priv->flags & TSEC_REDUCED)
+ mii_data = (mii_data & 0xfff0) | 0x000b;
+ return mii_data;
+}
+
/* Initialized required registers to appropriate values, zeroing
* those we don't care about (unless zero is bad, in which case,
* choose a more appropriate value)
@@ -1034,6 +1043,7 @@ struct phy_info phy_info_M88E1111S = {
(struct phy_cmd[]){ /* config */
/* Reset and configure the PHY */
{MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {0x1b, 0x848f, &mii_m88e1111s_setmode},
{0x14, 0x0cd2, NULL}, /* Delay RGMII TX and RX */
{MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
{MIIM_ANAR, MIIM_ANAR_INIT, NULL},