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authorSimon Goldschmidt <simon.k.r.goldschmidt@gmail.com>2018-10-30 21:09:48 +0100
committerSimon Glass <sjg@chromium.org>2018-11-20 19:14:22 -0700
commit12bfb2e05fc29bfbec7eb76ea8cc02e130268801 (patch)
tree05dd2716fc3975376ba204b216211318369584cc /drivers/spi/spi-uclass.c
parentb23644858bec1a21743debccb6643af7df5c48b4 (diff)
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dm: spi: prevent setting a speed of 0 Hz
When the device tree is missing a correct spi slave description below the bus (compatible "spi-flash" or spi-max-frequency are missing), the 'set_speed' callback can be called with 'speed' == 0 Hz. At least with cadence qspi, this leads to a division by zero. Prevent this by initializing speed to 100 kHz in this case (same fallback value as is done in 'dm_spi_claim_bus') and issue a warning to console. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/spi/spi-uclass.c')
-rw-r--r--drivers/spi/spi-uclass.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index b84255bd27..2bc289a74c 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -15,6 +15,8 @@
DECLARE_GLOBAL_DATA_PTR;
+#define SPI_DEFAULT_SPEED_HZ 100000
+
static int spi_set_speed_mode(struct udevice *bus, int speed, int mode)
{
struct dm_spi_ops *ops;
@@ -58,7 +60,7 @@ int dm_spi_claim_bus(struct udevice *dev)
speed = spi->max_hz;
}
if (!speed)
- speed = 100000;
+ speed = SPI_DEFAULT_SPEED_HZ;
if (speed != slave->speed) {
int ret = spi_set_speed_mode(bus, speed, slave->mode);
@@ -300,7 +302,13 @@ int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
}
plat = dev_get_parent_platdata(dev);
plat->cs = cs;
- plat->max_hz = speed;
+ if (speed) {
+ plat->max_hz = speed;
+ } else {
+ printf("Warning: SPI speed fallback to %u kHz\n",
+ SPI_DEFAULT_SPEED_HZ / 1000);
+ plat->max_hz = SPI_DEFAULT_SPEED_HZ;
+ }
plat->mode = mode;
created = true;
} else if (ret) {
@@ -374,7 +382,8 @@ int spi_slave_ofdata_to_platdata(struct udevice *dev,
int value;
plat->cs = dev_read_u32_default(dev, "reg", -1);
- plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", 0);
+ plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency",
+ SPI_DEFAULT_SPEED_HZ);
if (dev_read_bool(dev, "spi-cpol"))
mode |= SPI_CPOL;
if (dev_read_bool(dev, "spi-cpha"))