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authorSuresh Gupta <suresh.gupta@nxp.com>2017-08-30 20:06:33 +0530
committerJagan Teki <jagan@amarulasolutions.com>2017-09-25 12:49:56 +0530
commit1c631da459a82f4f82a063f5b4ff339ca5384d11 (patch)
tree024549b066804b69daccbace8bd733abc1cc78b5 /drivers/spi/fsl_qspi.h
parent994266bdff7903279b8e43ddbf220b04a4e1411f (diff)
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spi: fsl_qspi: Add controller busy check before new spi operation
It is recommended to check either controller is free to take new spi action. The IP_ACC and AHB_ACC bits indicates that the controller is busy in IP or AHB mode respectively. And the BUSY bit indicates that controller is currently busy handling a transaction to an external flash device Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'drivers/spi/fsl_qspi.h')
-rw-r--r--drivers/spi/fsl_qspi.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/spi/fsl_qspi.h b/drivers/spi/fsl_qspi.h
index 6cb361018b..e468eb2529 100644
--- a/drivers/spi/fsl_qspi.h
+++ b/drivers/spi/fsl_qspi.h
@@ -105,6 +105,10 @@ struct fsl_qspi_regs {
#define QSPI_RBCT_RXBRD_SHIFT 8
#define QSPI_RBCT_RXBRD_USEIPS (1 << QSPI_RBCT_RXBRD_SHIFT)
+#define QSPI_SR_AHB_ACC_SHIFT 2
+#define QSPI_SR_AHB_ACC_MASK (1 << QSPI_SR_AHB_ACC_SHIFT)
+#define QSPI_SR_IP_ACC_SHIFT 1
+#define QSPI_SR_IP_ACC_MASK (1 << QSPI_SR_IP_ACC_SHIFT)
#define QSPI_SR_BUSY_SHIFT 0
#define QSPI_SR_BUSY_MASK (1 << QSPI_SR_BUSY_SHIFT)