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| author | Simon Glass <sjg@chromium.org> | 2020-12-03 16:55:23 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2020-12-13 16:51:09 -0700 |
| commit | 8a8d24bdf174851ebb8607f359d54b72e3283b97 (patch) | |
| tree | 89fe2b9fd0c33209ce154170f9bda61f624dd9cd /drivers/spi/cadence_qspi.h | |
| parent | b012ff1f1b0d662587dcf8707fe7cbf1c1f35d2f (diff) | |
| download | u-boot-8a8d24bdf174851ebb8607f359d54b72e3283b97.tar.gz u-boot-8a8d24bdf174851ebb8607f359d54b72e3283b97.tar.xz u-boot-8a8d24bdf174851ebb8607f359d54b72e3283b97.zip | |
dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/spi/cadence_qspi.h')
| -rw-r--r-- | drivers/spi/cadence_qspi.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index ae459c74a1..64c5867609 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -15,7 +15,7 @@ #define CQSPI_DECODER_MAX_CS 16 #define CQSPI_READ_CAPTURE_MAX_DELAY 16 -struct cadence_spi_platdata { +struct cadence_spi_plat { unsigned int ref_clk_hz; unsigned int max_hz; void *regbase; @@ -52,7 +52,7 @@ struct cadence_spi_priv { }; /* Functions call declaration */ -void cadence_qspi_apb_controller_init(struct cadence_spi_platdata *plat); +void cadence_qspi_apb_controller_init(struct cadence_spi_plat *plat); void cadence_qspi_apb_controller_enable(void *reg_base_addr); void cadence_qspi_apb_controller_disable(void *reg_base_addr); void cadence_qspi_apb_dac_mode_enable(void *reg_base); @@ -62,13 +62,13 @@ int cadence_qspi_apb_command_read(void *reg_base_addr, int cadence_qspi_apb_command_write(void *reg_base_addr, const struct spi_mem_op *op); -int cadence_qspi_apb_read_setup(struct cadence_spi_platdata *plat, +int cadence_qspi_apb_read_setup(struct cadence_spi_plat *plat, const struct spi_mem_op *op); -int cadence_qspi_apb_read_execute(struct cadence_spi_platdata *plat, +int cadence_qspi_apb_read_execute(struct cadence_spi_plat *plat, const struct spi_mem_op *op); -int cadence_qspi_apb_write_setup(struct cadence_spi_platdata *plat, +int cadence_qspi_apb_write_setup(struct cadence_spi_plat *plat, const struct spi_mem_op *op); -int cadence_qspi_apb_write_execute(struct cadence_spi_platdata *plat, +int cadence_qspi_apb_write_execute(struct cadence_spi_plat *plat, const struct spi_mem_op *op); void cadence_qspi_apb_chipselect(void *reg_base, |