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| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-02-27 13:36:14 +0800 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-04-12 10:54:03 +0530 |
| commit | 7eece328128ceffbd3b7425de5bfc9b29730730d (patch) | |
| tree | 8cacdb53aa2df78c3cbe9d7e9a3f27f20220c1cf /drivers/spi/cadence_qspi.h | |
| parent | 02f173ca156cee8526dff87603d5e446b443cde3 (diff) | |
| download | u-boot-7eece328128ceffbd3b7425de5bfc9b29730730d.tar.gz u-boot-7eece328128ceffbd3b7425de5bfc9b29730730d.tar.xz u-boot-7eece328128ceffbd3b7425de5bfc9b29730730d.zip | |
spi: cadence_qspi: Add quad write support
Use quad write if SPI_TX_QUAD flag is set.
Tested quad write on Stratix 10 SoC board (Micron
serial NOR flash, mt25qu02g)
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'drivers/spi/cadence_qspi.h')
| -rw-r--r-- | drivers/spi/cadence_qspi.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index 055900def0..b491407130 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -60,7 +60,7 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, int cadence_qspi_apb_indirect_read_execute(struct cadence_spi_platdata *plat, unsigned int rxlen, u8 *rxbuf); int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, - unsigned int cmdlen, const u8 *cmdbuf); + unsigned int cmdlen, unsigned int tx_width, const u8 *cmdbuf); int cadence_qspi_apb_indirect_write_execute(struct cadence_spi_platdata *plat, unsigned int txlen, const u8 *txbuf); |