summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl
diff options
context:
space:
mode:
authorKen Ma <make@marvell.com>2017-06-22 17:13:35 +0800
committerStefan Roese <sr@denx.de>2017-06-23 07:09:40 +0200
commitb5a6c94a0380071600dc5b8be1853164f62af146 (patch)
treecaf724c91f0098172f57c946c86283a62d90069d /drivers/pinctrl
parent235c5b8315c6a9eb566fd3d99a098cc6db869fc5 (diff)
downloadu-boot-b5a6c94a0380071600dc5b8be1853164f62af146.tar.gz
u-boot-b5a6c94a0380071600dc5b8be1853164f62af146.tar.xz
u-boot-b5a6c94a0380071600dc5b8be1853164f62af146.zip
pinctrl: a3700: Fix uart2 group selection register mask
If north bridge selection register bit1 is clear, pins [10:8] are for SDIO0 Resetn, Wakeup, and PDN while if bit1 is set, pins [10:8]are for GPIO; when bit1 is clear, pin 9 and pin 10 can be used for uart2 RTSn and CTSn, so bit1 should be added to uart2 group and it must be set for both "gpio" and "uart" functions of uart2 group. Signed-off-by: Ken Ma <make@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-armada-37xx.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 3bb4c4341c..2ac66ec325 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -159,8 +159,9 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
PIN_GRP_GPIO("onewire", 4, 1, BIT(16), "onewire"),
PIN_GRP_GPIO("uart1", 25, 2, BIT(17), "uart"),
PIN_GRP_GPIO("spi_quad", 15, 2, BIT(18), "spi"),
- PIN_GRP_EXTRA("uart2", 9, 2, BIT(13) | BIT(14) | BIT(19),
- BIT(13) | BIT(14), BIT(19), 18, 2, "gpio", "uart"),
+ PIN_GRP_EXTRA("uart2", 9, 2, BIT(1) | BIT(13) | BIT(14) | BIT(19),
+ BIT(1) | BIT(13) | BIT(14), BIT(1) | BIT(19),
+ 18, 2, "gpio", "uart"),
PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"),
PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"),
PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"),