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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-04-21 22:46:25 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-05-04 19:26:49 +0200 |
| commit | 89ba7c5a8cf3cdef34f5acef4184f35e63439759 (patch) | |
| tree | 3d34c307ece3495d05e4b210eed95bc593ffed8c /drivers/pinctrl | |
| parent | 50e6901fec0bd7dbfb2e39e750119ee0c78160c5 (diff) | |
| download | u-boot-89ba7c5a8cf3cdef34f5acef4184f35e63439759.tar.gz u-boot-89ba7c5a8cf3cdef34f5acef4184f35e63439759.tar.xz u-boot-89ba7c5a8cf3cdef34f5acef4184f35e63439759.zip | |
pinctrl: renesas: Implement gpio_request_enable/gpio_disable_free
Implement the gpio_request_enable/gpio_disable_free callbacks to let
the GPIO driver call the pin control framework and let it reconfigure
pins as GPIOs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Cc: Eugeniu Rosca <roscaeugeniu@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick DELAUNAY <patrick.delaunay@st.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/renesas/pfc.c | 40 |
1 files changed, 39 insertions, 1 deletions
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c index 59dc4af702..52c486ebc2 100644 --- a/drivers/pinctrl/renesas/pfc.c +++ b/drivers/pinctrl/renesas/pfc.c @@ -459,7 +459,8 @@ static const char *sh_pfc_pinctrl_get_function_name(struct udevice *dev, return priv->pfc.info->functions[selector].name; } -int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector) +static int sh_pfc_gpio_request_enable(struct udevice *dev, + unsigned pin_selector) { struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); struct sh_pfc_pinctrl *pmx = &priv->pmx; @@ -494,6 +495,40 @@ int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector) return 0; } +static int sh_pfc_gpio_disable_free(struct udevice *dev, + unsigned pin_selector) +{ + struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev); + struct sh_pfc_pinctrl *pmx = &priv->pmx; + struct sh_pfc *pfc = &priv->pfc; + struct sh_pfc_pin_config *cfg; + const struct sh_pfc_pin *pin = NULL; + int i, idx; + + for (i = 1; i < pfc->info->nr_pins; i++) { + if (priv->pfc.info->pins[i].pin != pin_selector) + continue; + + pin = &priv->pfc.info->pins[i]; + break; + } + + if (!pin) + return -EINVAL; + + idx = sh_pfc_get_pin_index(pfc, pin->pin); + cfg = &pmx->configs[idx]; + + cfg->type = PINMUX_TYPE_NONE; + + return 0; +} + +int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector) +{ + return sh_pfc_gpio_request_enable(dev, pin_selector); +} + static int sh_pfc_pinctrl_pin_set(struct udevice *dev, unsigned pin_selector, unsigned func_selector) { @@ -752,6 +787,9 @@ static struct pinctrl_ops sh_pfc_pinctrl_ops = { .pinmux_set = sh_pfc_pinctrl_pin_set, .pinmux_group_set = sh_pfc_pinctrl_group_set, .set_state = pinctrl_generic_set_state, + + .gpio_request_enable = sh_pfc_gpio_request_enable, + .gpio_disable_free = sh_pfc_gpio_disable_free, }; static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx) |