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author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-05-06 09:55:59 +0800 |
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committer | Marek Vasut <marex@denx.de> | 2019-05-06 12:44:17 +0200 |
commit | 5918afda9d43106dd540c04bb05b7718e5f82171 (patch) | |
tree | b9b74a2ceb15ea5edb7b791552e4e1b89f232a35 /drivers/ddr | |
parent | 86f578ee85a697afb980233312f9aac1d98816df (diff) | |
download | u-boot-5918afda9d43106dd540c04bb05b7718e5f82171.tar.gz u-boot-5918afda9d43106dd540c04bb05b7718e5f82171.tar.xz u-boot-5918afda9d43106dd540c04bb05b7718e5f82171.zip |
ddr: altera: Compile ALTERA SDRAM in SPL only
Compile ALTERA_SDRAM driver in SPL only.
Rename ALTERA_SDRAM to SPL_ALTERA_SDRAM.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'drivers/ddr')
-rw-r--r-- | drivers/ddr/altera/Kconfig | 5 | ||||
-rw-r--r-- | drivers/ddr/altera/Makefile | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig index 8f60b56eb8..83c1ab5e07 100644 --- a/drivers/ddr/altera/Kconfig +++ b/drivers/ddr/altera/Kconfig @@ -1,5 +1,6 @@ -config ALTERA_SDRAM - bool "SoCFPGA DDR SDRAM driver" +config SPL_ALTERA_SDRAM + bool "SoCFPGA DDR SDRAM driver in SPL" + depends on SPL depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 select RAM if TARGET_SOCFPGA_GEN5 select SPL_RAM if TARGET_SOCFPGA_GEN5 diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile index 3615b617ec..341ac0d73b 100644 --- a/drivers/ddr/altera/Makefile +++ b/drivers/ddr/altera/Makefile @@ -6,7 +6,7 @@ # (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw> # Copyright (C) 2014 Altera Corporation <www.altera.com> -ifdef CONFIG_ALTERA_SDRAM +ifdef CONFIG_$(SPL_)ALTERA_SDRAM obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_s10.o |