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| author | Bin Meng <bmeng.cn@gmail.com> | 2021-02-03 22:42:25 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2021-03-03 19:17:25 -0700 |
| commit | 384b62c073f3aaccba0c917a8da7701a82441aec (patch) | |
| tree | 34016a954bbcba79b78713790480b5072828d29b /drivers/ddr/marvell/a38x/ddr3_debug.c | |
| parent | 09bd08401a5ff2cdbf40fdc27a8add809ae11075 (diff) | |
| download | u-boot-384b62c073f3aaccba0c917a8da7701a82441aec.tar.gz u-boot-384b62c073f3aaccba0c917a8da7701a82441aec.tar.xz u-boot-384b62c073f3aaccba0c917a8da7701a82441aec.zip | |
serial: ns16550: Handle zero <clock-frequency> value
A working device tree node of ns16550 should never be populated
with value zero for the <clock-frequency> property. Unfortunately
this is the case for the QEMU ppce500 target.
Let's try to assign plat->clock to CONFIG_SYS_NS16550_CLK as the
last resort to handle such case.
This commit should be reverted when:
- The following QEMU patch [1] is merged, and
- U-Boot CI has upgraded its QEMU version that contains the fix
[1] http://patchwork.ozlabs.org/project/qemu-devel/patch/1612362288-22216-2-git-send-email-bmeng.cn@gmail.com/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_debug.c')
0 files changed, 0 insertions, 0 deletions