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author | Haibo Chen <haibo.chen@nxp.com> | 2020-11-03 17:18:35 +0800 |
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committer | Stefano Babic <sbabic@denx.de> | 2020-12-06 15:31:37 +0100 |
commit | 5d772196d93509306f9a4333e181a64f3e7e4249 (patch) | |
tree | b61037e092ab54e2a990e3d69512985cc182febb /drivers/ddr/imx/imx8m/ddr_init.c | |
parent | ea51af2fdd87bb5da024507c9233a038e84e8737 (diff) | |
download | u-boot-5d772196d93509306f9a4333e181a64f3e7e4249.tar.gz u-boot-5d772196d93509306f9a4333e181a64f3e7e4249.tar.xz u-boot-5d772196d93509306f9a4333e181a64f3e7e4249.zip |
mmc: fsl_esdhc_imx: optimize the timing setting
For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the
card clock will be divied by 2 automatically by the host. So need
to first config the DDR_EN correctly, then update the card clock.
This will make sure the actual card clock is as our expected.
IC also suggest config the DDR_EN firstly, then config the clock
divider.
For HS400/HS400ES mode, need to config the strobe dll, this need
to based on the correct target clock rate, so need to do this after
clock rate is update.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/ddr/imx/imx8m/ddr_init.c')
0 files changed, 0 insertions, 0 deletions