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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-03-04 21:23:25 +0100 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-04-09 18:19:10 +0200 |
| commit | a3c31e98a118f78e06d87311b082e54854ff6537 (patch) | |
| tree | 8ca4a08d1141cac2c9385eb2450709d9be192250 /drivers/clk/renesas/r8a7790-cpg-mssr.c | |
| parent | c4ea43d12f7268b6cabbbe8c153e8f67d11c9081 (diff) | |
| download | u-boot-a3c31e98a118f78e06d87311b082e54854ff6537.tar.gz u-boot-a3c31e98a118f78e06d87311b082e54854ff6537.tar.xz u-boot-a3c31e98a118f78e06d87311b082e54854ff6537.zip | |
clk: renesas: Synchronize Gen2 tables with Linux 5.0
Synchronize R-Car Gen2 clock tables with Linux 5.0,
commit 1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/clk/renesas/r8a7790-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a7790-cpg-mssr.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c index 360c02c5fd..b62b8753cd 100644 --- a/drivers/clk/renesas/r8a7790-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0 /* * r8a7790 Clock Pulse Generator / Module Standby and Software Reset * @@ -6,10 +7,6 @@ * Based on clk-rcar-gen2.c * * Copyright (C) 2013 Ideas On Board SPRL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. */ #include <common.h> @@ -139,6 +136,7 @@ static const struct mssr_mod_clk r8a7790_mod_clks[] = { DEF_MOD("cmt1", 329, R8A7790_CLK_R), DEF_MOD("usbhs-dmac0", 330, R8A7790_CLK_HP), DEF_MOD("usbhs-dmac1", 331, R8A7790_CLK_HP), + DEF_MOD("rwdt", 402, R8A7790_CLK_R), DEF_MOD("irqc", 407, R8A7790_CLK_CP), DEF_MOD("intc-sys", 408, R8A7790_CLK_ZS), DEF_MOD("audio-dmac1", 501, R8A7790_CLK_HP), |