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| author | wdenk <wdenk> | 2004-01-31 20:06:54 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2004-01-31 20:06:54 +0000 |
| commit | 75d1ea7f6aa00c280c495a1ff6502f091c4244fe (patch) | |
| tree | bb1ee058f8886ae42cb85a6b2c82f3d6b18661bf /cpu | |
| parent | 6876609446980c3055bbd32c195a63330e21d8e6 (diff) | |
| download | u-boot-75d1ea7f6aa00c280c495a1ff6502f091c4244fe.tar.gz u-boot-75d1ea7f6aa00c280c495a1ff6502f091c4244fe.tar.xz u-boot-75d1ea7f6aa00c280c495a1ff6502f091c4244fe.zip | |
Fix variable CPU clock for MPC859/866 systems for low CPU clocks
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc8xx/cpu.c | 18 | ||||
| -rw-r--r-- | cpu/mpc8xx/serial.c | 4 | ||||
| -rw-r--r-- | cpu/mpc8xx/speed.c | 29 |
3 files changed, 41 insertions, 10 deletions
diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index 3fb97b07ca..81d2047c9c 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -123,10 +123,22 @@ static int check_CPU (long clock, uint pvr, uint immr) else printf ("unknown M%s (0x%08x)", id_str, k); - printf (" at %s MHz:", strmhz (buf, clock)); - printf (" %u kB I-Cache", checkicache () >> 10); - printf (" %u kB D-Cache", checkdcache () >> 10); +#if defined(CFG_866_CPUCLK_MIN) && defined(CFG_866_CPUCLK_MAX) + printf (" at %s MHz [%d.%d...%d.%d MHz]\n ", + strmhz (buf, clock), + CFG_866_CPUCLK_MIN / 1000000, + ((CFG_866_CPUCLK_MIN % 1000000) + 50000) / 100000, + CFG_866_CPUCLK_MAX / 1000000, + ((CFG_866_CPUCLK_MAX % 1000000) + 50000) / 100000 + ); +#else + printf (" at %s MHz: ", strmhz (buf, clock)); +#endif + printf ("%u kB I-Cache %u kB D-Cache", + checkicache () >> 10, + checkdcache () >> 10 + ); /* do we have a FEC (860T/P or 852/859/866)? */ diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c index a875963df3..71f3ae1f45 100644 --- a/cpu/mpc8xx/serial.c +++ b/cpu/mpc8xx/serial.c @@ -71,11 +71,11 @@ static void serial_setdivisor(volatile cpm8xx_t *cp) { DECLARE_GLOBAL_DATA_PTR; - int divisor=gd->cpu_clk/16/gd->baudrate; + int divisor=(gd->cpu_clk + 8*gd->baudrate)/16/gd->baudrate; if(divisor/16>0x1000) { /* bad divisor, assume 50Mhz clock and 9600 baud */ - divisor=(50*1000*1000)/16/9600; + divisor=(50*1000*1000 + 8*9600)/16/9600; } #ifdef CFG_BRGCLK_PRESCALE diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c index 8583eef63c..8f8efce505 100644 --- a/cpu/mpc8xx/speed.c +++ b/cpu/mpc8xx/speed.c @@ -25,7 +25,7 @@ #include <mpc8xx.h> #include <asm/processor.h> -#ifndef CONFIG_TQM866M +#if !defined(CONFIG_TQM866M) || defined(CFG_MEASURE_CPUCLK) #define PITC_SHIFT 16 #define PITR_SHIFT 16 @@ -170,6 +170,10 @@ unsigned long measure_gclk(void) #endif } +#endif + +#if !defined(CONFIG_TQM866M) + /* * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ * or (if it is not defined) measure_gclk() (which uses the ref clock) @@ -230,6 +234,9 @@ int get_clocks_866 (void) cpuclk = CFG_866_CPUCLK_DEFAULT; gd->cpu_clk = init_pll_866 (cpuclk); +#if defined(CFG_MEASURE_CPUCLK) + gd->cpu_clk = measure_gclk (); +#endif if ((immr->im_clkrst.car_sccr & SCCR_EBDF11) == 0) gd->bus_clk = gd->cpu_clk; @@ -269,8 +276,19 @@ static long init_pll_866 (long clk) char mfi, mfn, mfd, s, pdf; long step_mfi, step_mfn; - pdf = 0; - if (clk < 80000000) { + if (clk < 20000000) { + clk *= 2; + pdf = 1; + } else { + pdf = 0; + } + + if (clk < 40000000) { + s = 2; + step_mfi = CFG_866_OSCCLK / 4; + mfd = 7; + step_mfn = CFG_866_OSCCLK / 30; + } else if (clk < 80000000) { s = 1; step_mfi = CFG_866_OSCCLK / 2; mfd = 14; @@ -294,13 +312,14 @@ static long init_pll_866 (long clk) /* Calculate effective clk */ - n = (mfi * step_mfi) + (mfn * step_mfn); + n = ((mfi * step_mfi) + (mfn * step_mfn)) / (pdf + 1); immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; plprcr = (immr->im_clkrst.car_plprcr & ~(PLPRCR_MFN_MSK | PLPRCR_MFD_MSK | PLPRCR_S_MSK - | PLPRCR_MFI_MSK | PLPRCR_DBRMO)) + | PLPRCR_MFI_MSK | PLPRCR_DBRMO + | PLPRCR_PDF_MSK)) | (mfn << PLPRCR_MFN_SHIFT) | (mfd << PLPRCR_MFD_SHIFT) | (s << PLPRCR_S_SHIFT) |