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| author | Marian Balakowicz <m8@semihalf.com> | 2006-06-30 18:19:42 +0200 |
|---|---|---|
| committer | Marian Balakowicz <m8@semihalf.com> | 2006-06-30 18:19:42 +0200 |
| commit | f6e5739a68131998a5ae8aa0cf56a0316f810200 (patch) | |
| tree | 010b89799af2478323c7f1cc04665b51b5cc4e50 /cpu/ppc4xx/cpu.c | |
| parent | f73e73ba0e422e6f79030d77286dd57becaee16f (diff) | |
| parent | 6c5879f380be38d85fef0d3aba3353358f4b2ff4 (diff) | |
| download | u-boot-f6e5739a68131998a5ae8aa0cf56a0316f810200.tar.gz u-boot-f6e5739a68131998a5ae8aa0cf56a0316f810200.tar.xz u-boot-f6e5739a68131998a5ae8aa0cf56a0316f810200.zip | |
Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).
Diffstat (limited to 'cpu/ppc4xx/cpu.c')
| -rw-r--r-- | cpu/ppc4xx/cpu.c | 18 |
1 files changed, 14 insertions, 4 deletions
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index d9b5d32c90..6a84b09732 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -82,7 +82,9 @@ int pci_arbiter_enabled(void) return (mfdcr(cpc0_strp1) & CPC0_STRP1_PAE_MASK); #endif -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \ + defined(CONFIG_440GR) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) unsigned long val; mfsdr(sdr_sdstp1, val); @@ -91,8 +93,8 @@ int pci_arbiter_enabled(void) } #endif -#if defined(CONFIG_405EP)|| defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ - defined(CONFIG_440GX) || defined(CONFIG_440SP) +#if defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ + defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE) #define I2C_BOOTROM @@ -102,7 +104,9 @@ int i2c_bootrom_enabled(void) return (mfdcr(cpc0_boot) & CPC0_BOOT_SEP); #endif -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || \ + defined(CONFIG_440GR) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) unsigned long val; mfsdr(sdr_sdcs, val); @@ -248,6 +252,12 @@ int checkcpu (void) puts("SP Rev. B"); break; + case PVR_440SPe_RA: + puts("SPe 3GA533C"); + break; + case PVR_440SPe_RB: + puts("SPe 3GB533C"); + break; default: printf (" UNKNOWN (PVR=%08x)", pvr); break; |